From 3c1d218a1d3048fb576677c47eab43049d0b7778 Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 4 Apr 2016 11:41:26 -0700 Subject: armv8: LS2080A: Consolidate LS2080A and LS2085A LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun CC: Prabhakar Kushwaha Reviewed-by: Prabhakar Kushwaha --- drivers/crypto/fsl/jr.c | 6 +++--- drivers/net/fsl-mc/mc.c | 10 ++++++++++ drivers/net/ldpaa_eth/Makefile | 1 - 3 files changed, 13 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 3fc418a8c42..8bc517dadcf 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -545,12 +545,12 @@ int sec_init(void) /* * Modifying CAAM Read/Write Attributes - * For LS2080A and LS2085A + * For LS2080A * For AXI Write - Cacheable, Write Back, Write allocate * For AXI Read - Cacheable, Read allocate - * Only For LS2080a and LS2085a, to solve CAAM coherency issues + * Only For LS2080a, to solve CAAM coherency issues */ -#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) +#ifdef CONFIG_LS2080A mcr = (mcr & ~MCFGR_AWCACHE_MASK) | (0xb << MCFGR_AWCACHE_SHIFT); mcr = (mcr & ~MCFGR_ARCACHE_MASK) | (0x6 << MCFGR_ARCACHE_SHIFT); #else diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index d2b8b5c47f1..1811b0fe1a3 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -356,6 +356,12 @@ static unsigned long get_mc_boot_timeout_ms(void) } #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET + +__weak bool soc_has_aiop(void) +{ + return false; +} + static int load_mc_aiop_img(u64 aiop_fw_addr) { u64 mc_ram_addr = mc_get_dram_addr(); @@ -363,6 +369,9 @@ static int load_mc_aiop_img(u64 aiop_fw_addr) void *aiop_img; #endif + /* Check if AIOP is available */ + if (!soc_has_aiop()) + return -ENODEV; /* * Load the MC AIOP image in the MC private DRAM block: */ @@ -1235,6 +1244,7 @@ static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) aiop_fw_addr = simple_strtoull(argv[3], NULL, 16); + /* if SoC doesn't have AIOP, err = -ENODEV */ err = load_mc_aiop_img(aiop_fw_addr); if (!err) printf("fsl-mc: AIOP FW applied\n"); diff --git a/drivers/net/ldpaa_eth/Makefile b/drivers/net/ldpaa_eth/Makefile index 74c49165d5f..5587aa618df 100644 --- a/drivers/net/ldpaa_eth/Makefile +++ b/drivers/net/ldpaa_eth/Makefile @@ -7,4 +7,3 @@ obj-y += ldpaa_wriop.o obj-y += ldpaa_eth.o obj-$(CONFIG_LS2080A) += ls2080a.o -obj-$(CONFIG_LS2085A) += ls2080a.o -- cgit v1.2.3