From 24bf59d0243f0ee496b20aee985968729b8d0386 Mon Sep 17 00:00:00 2001 From: Vasily Khoruzhick Date: Wed, 20 Sep 2017 23:29:08 -0700 Subject: video: anx9804: split out registers definitions into a separate header This header will be used in anx6345 driver Signed-off-by: Vasily Khoruzhick [agust: moved header to drivers/video] Signed-off-by: Anatolij Gustschin --- drivers/video/anx9804.c | 54 +------------------------------------------------ 1 file changed, 1 insertion(+), 53 deletions(-) (limited to 'drivers/video/anx9804.c') diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c index 37ad69a039..3910458bf1 100755 --- a/drivers/video/anx9804.c +++ b/drivers/video/anx9804.c @@ -12,61 +12,9 @@ #include #include +#include "anx98xx-edp.h" #include "anx9804.h" -/* Registers at i2c address 0x38 */ - -#define ANX9804_HDCP_CONTROL_0_REG 0x01 - -#define ANX9804_SYS_CTRL2_REG 0x81 -#define ANX9804_SYS_CTRL2_CHA_STA 0x04 - -#define ANX9804_SYS_CTRL3_REG 0x82 -#define ANX9804_SYS_CTRL3_VALID_CTRL BIT(0) -#define ANX9804_SYS_CTRL3_F_VALID BIT(1) -#define ANX9804_SYS_CTRL3_HPD_CTRL BIT(4) -#define ANX9804_SYS_CTRL3_F_HPD BIT(5) - -#define ANX9804_LINK_BW_SET_REG 0xa0 -#define ANX9804_LANE_COUNT_SET_REG 0xa1 -#define ANX9804_TRAINING_PTN_SET_REG 0xa2 -#define ANX9804_TRAINING_LANE0_SET_REG 0xa3 -#define ANX9804_TRAINING_LANE1_SET_REG 0xa4 -#define ANX9804_TRAINING_LANE2_SET_REG 0xa5 -#define ANX9804_TRAINING_LANE3_SET_REG 0xa6 - -#define ANX9804_LINK_TRAINING_CTRL_REG 0xa8 -#define ANX9804_LINK_TRAINING_CTRL_EN BIT(0) - -#define ANX9804_LINK_DEBUG_REG 0xb8 -#define ANX9804_PLL_CTRL_REG 0xc7 -#define ANX9804_ANALOG_POWER_DOWN_REG 0xc8 - -/* Registers at i2c address 0x39 */ - -#define ANX9804_DEV_IDH_REG 0x03 - -#define ANX9804_POWERD_CTRL_REG 0x05 -#define ANX9804_POWERD_AUDIO BIT(4) - -#define ANX9804_RST_CTRL_REG 0x06 - -#define ANX9804_RST_CTRL2_REG 0x07 -#define ANX9804_RST_CTRL2_AUX BIT(2) -#define ANX9804_RST_CTRL2_AC_MODE BIT(6) - -#define ANX9804_VID_CTRL1_REG 0x08 -#define ANX9804_VID_CTRL1_VID_EN BIT(7) -#define ANX9804_VID_CTRL1_EDGE BIT(0) - -#define ANX9804_VID_CTRL2_REG 0x09 -#define ANX9804_ANALOG_DEBUG_REG1 0xdc -#define ANX9804_ANALOG_DEBUG_REG3 0xde -#define ANX9804_PLL_FILTER_CTRL1 0xdf -#define ANX9804_PLL_FILTER_CTRL3 0xe1 -#define ANX9804_PLL_FILTER_CTRL 0xe2 -#define ANX9804_PLL_CTRL3 0xe6 - /** * anx9804_init() - Init anx9804 parallel lcd to edp bridge chip * -- cgit v1.2.3