From 7586ac2b49dd3046868354201ab6a208c3a5b82c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Tue, 24 Apr 2018 17:21:21 +0200 Subject: phy: marvell: mux: Support nontrivial node order in selector register Currently comphy_mux supports only trivial order of nodes in pin selector register, that is lane N on position N*bitcount. Add support for nontrivial order, with map stored in device tree property mux-lane-order. This is needed for Armada 37xx. As far as I know, there is no driver for Armada 37xx comphy in the kernel. When such a driver comes, this will need to be rewritten to support the device tree bindings from the kernel. Signed-off-by: Marek Behun Signed-off-by: Stefan Roese --- drivers/phy/marvell/comphy_core.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/phy/marvell/comphy_core.c') diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c index 17ab39c5d02..2622751f49b 100644 --- a/drivers/phy/marvell/comphy_core.c +++ b/drivers/phy/marvell/comphy_core.c @@ -134,6 +134,10 @@ static int comphy_probe(struct udevice *dev) return -EINVAL; } + chip_cfg->comphy_mux_lane_order = + fdtdec_locate_array(blob, node, "mux-lane-order", + chip_cfg->comphy_lanes_count); + if (device_is_compatible(dev, "marvell,comphy-armada-3700")) chip_cfg->ptr_comphy_chip_init = comphy_a3700_init; -- cgit v1.2.3