From 8564acf936726c5568d71e4fa93a0ae9814e0d07 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Mon, 14 Jul 2003 22:13:32 +0000
Subject: * Patches by Yuli Barcohen, 13 Jul 2003:   - Correct flash and JFFS2
 support for MPC8260ADS   - fix PVR values and clock generation for PowerQUICC
 II family     (8270/8275/8280)

* Patch by Bernhard Kuhn, 08 Jul 2003:
  - add support for M68K targets

* Patch by Ken Chou, 3 Jul:
  - Fix PCI config table for A3000
  - Fix iobase for natsemi.c
    (PCI_BASE_ADDRESS_0 is the IO base register for DP83815)

* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON
---
 cpu/mpc8260/commproc.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

(limited to 'cpu/mpc8260/commproc.c')

diff --git a/cpu/mpc8260/commproc.c b/cpu/mpc8260/commproc.c
index c523ee4dca7..72cceb3cc4b 100644
--- a/cpu/mpc8260/commproc.c
+++ b/cpu/mpc8260/commproc.c
@@ -111,9 +111,9 @@ m8260_cpm_hostalloc(uint size, uint align)
  * to port numbers).  Documentation uses 1-based numbering.
  */
 #define BRG_INT_CLK	gd->brg_clk
-#define BRG_UART_CLK	((BRG_INT_CLK + 15) / 16)
+#define BRG_UART_CLK	(BRG_INT_CLK / 16)
 
-/* This function is used by UARTS, or anything else that uses a 16x
+/* This function is used by UARTs, or anything else that uses a 16x
  * oversampled clock.
  */
 void
@@ -123,9 +123,10 @@ m8260_cpm_setbrg(uint brg, uint rate)
 
 	volatile immap_t *immr = (immap_t *)CFG_IMMR;
 	volatile uint	*bp;
+	uint cd = BRG_UART_CLK / rate;
 
-	/* This is good enough to get SMCs running.....
-	*/
+	if ((BRG_UART_CLK % rate) < (rate / 2))
+		cd--;
 	if (brg < 4) {
 		bp = (uint *)&immr->im_brgc1;
 	}
@@ -134,7 +135,7 @@ m8260_cpm_setbrg(uint brg, uint rate)
 		brg -= 4;
 	}
 	bp += brg;
-	*bp = (((((BRG_UART_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
+	*bp = (cd << 1) | CPM_BRG_EN;
 }
 
 /* This function is used to set high speed synchronous baud rate
-- 
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