From 61106a565870ff503f92b251b94bd7afef889a04 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Wed, 26 Mar 2008 21:52:27 +0100 Subject: Use timer_init() instead of board supplied interrupt_init() The timer on AT91CAP9/AT91SAM9 is supplied by the SoC, and not by the board, so use timer_init() instead of interrupt_init(). Signed-off-by: Stelian Pop --- cpu/arm926ejs/at91cap9/timer.c | 2 +- cpu/arm926ejs/interrupts.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'cpu/arm926ejs') diff --git a/cpu/arm926ejs/at91cap9/timer.c b/cpu/arm926ejs/at91cap9/timer.c index 4110e15b5cc..c6df5bd81b8 100644 --- a/cpu/arm926ejs/at91cap9/timer.c +++ b/cpu/arm926ejs/at91cap9/timer.c @@ -41,7 +41,7 @@ ulong resettime; AT91PS_PITC p_pitc; /* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init(void) +int timer_init(void) { /* * Enable PITC Clock diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c index 0971fea8143..1819f6b0787 100644 --- a/cpu/arm926ejs/interrupts.c +++ b/cpu/arm926ejs/interrupts.c @@ -38,7 +38,7 @@ #include #include -#if defined(CONFIG_INTEGRATOR) || defined(CONFIG_AT91CAP9ADK) +#ifdef CONFIG_INTEGRATOR /* Timer functionality supplied by Integrator board (AP or CP) */ -- cgit v1.2.3 From a8a78f2d99dc1bd30dc3595da118539b506c6118 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Wed, 26 Mar 2008 20:52:28 +0100 Subject: Move at91cap9 specific files to at91sam9 directory AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a common infrastructure can be used. Let this infrastructure be named after the AT91SAM9 family, and move the existing AT91CAP9 files to the new place. Signed-off-by: Stelian Pop --- cpu/arm926ejs/at91cap9/Makefile | 46 ---------- cpu/arm926ejs/at91cap9/config.mk | 2 - cpu/arm926ejs/at91cap9/ether.c | 35 -------- cpu/arm926ejs/at91cap9/lowlevel_init.S | 43 ---------- cpu/arm926ejs/at91cap9/spi.c | 119 -------------------------- cpu/arm926ejs/at91cap9/timer.c | 149 --------------------------------- cpu/arm926ejs/at91cap9/usb.c | 54 ------------ cpu/arm926ejs/at91sam9/Makefile | 46 ++++++++++ cpu/arm926ejs/at91sam9/config.mk | 2 + cpu/arm926ejs/at91sam9/ether.c | 35 ++++++++ cpu/arm926ejs/at91sam9/lowlevel_init.S | 43 ++++++++++ cpu/arm926ejs/at91sam9/spi.c | 119 ++++++++++++++++++++++++++ cpu/arm926ejs/at91sam9/timer.c | 148 ++++++++++++++++++++++++++++++++ cpu/arm926ejs/at91sam9/usb.c | 52 ++++++++++++ 14 files changed, 445 insertions(+), 448 deletions(-) delete mode 100644 cpu/arm926ejs/at91cap9/Makefile delete mode 100644 cpu/arm926ejs/at91cap9/config.mk delete mode 100644 cpu/arm926ejs/at91cap9/ether.c delete mode 100644 cpu/arm926ejs/at91cap9/lowlevel_init.S delete mode 100644 cpu/arm926ejs/at91cap9/spi.c delete mode 100644 cpu/arm926ejs/at91cap9/timer.c delete mode 100644 cpu/arm926ejs/at91cap9/usb.c create mode 100644 cpu/arm926ejs/at91sam9/Makefile create mode 100644 cpu/arm926ejs/at91sam9/config.mk create mode 100644 cpu/arm926ejs/at91sam9/ether.c create mode 100644 cpu/arm926ejs/at91sam9/lowlevel_init.S create mode 100644 cpu/arm926ejs/at91sam9/spi.c create mode 100644 cpu/arm926ejs/at91sam9/timer.c create mode 100644 cpu/arm926ejs/at91sam9/usb.c (limited to 'cpu/arm926ejs') diff --git a/cpu/arm926ejs/at91cap9/Makefile b/cpu/arm926ejs/at91cap9/Makefile deleted file mode 100644 index bf15e1edb33..00000000000 --- a/cpu/arm926ejs/at91cap9/Makefile +++ /dev/null @@ -1,46 +0,0 @@ -# -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(SOC).a - -COBJS = ether.o timer.o spi.o usb.o -SOBJS = lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) - -all: $(obj).depend $(LIB) - -$(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/cpu/arm926ejs/at91cap9/config.mk b/cpu/arm926ejs/at91cap9/config.mk deleted file mode 100644 index ca2cae181bc..00000000000 --- a/cpu/arm926ejs/at91cap9/config.mk +++ /dev/null @@ -1,2 +0,0 @@ -PLATFORM_CPPFLAGS += -march=armv5te -PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,) diff --git a/cpu/arm926ejs/at91cap9/ether.c b/cpu/arm926ejs/at91cap9/ether.c deleted file mode 100644 index b7958d5aba1..00000000000 --- a/cpu/arm926ejs/at91cap9/ether.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop leadtechdesign.com> - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - -#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) -void at91cap9_eth_initialize(bd_t *bi) -{ - macb_eth_initialize(0, (void *)AT91C_BASE_MACB, 0x00); -} -#endif diff --git a/cpu/arm926ejs/at91cap9/lowlevel_init.S b/cpu/arm926ejs/at91cap9/lowlevel_init.S deleted file mode 100644 index 24d950cf74e..00000000000 --- a/cpu/arm926ejs/at91cap9/lowlevel_init.S +++ /dev/null @@ -1,43 +0,0 @@ -/* - * AT91CAP9 setup stuff - * - * (C) Copyright 2007-2008 - * Stelian Pop leadtechdesign.com> - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - -.globl lowlevel_init -lowlevel_init: - - /* - * Clocks/SDRAM initialization is handled by at91bootstrap, - * no need to do it here... - */ - mov pc, lr - - .ltorg - -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/cpu/arm926ejs/at91cap9/spi.c b/cpu/arm926ejs/at91cap9/spi.c deleted file mode 100644 index 0953820bdf6..00000000000 --- a/cpu/arm926ejs/at91cap9/spi.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Driver for ATMEL DataFlash support - * Author : Hamid Ikdoumi (Atmel) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#include -#include -#include - -#ifdef CONFIG_HAS_DATAFLASH -#include - -/* Max Value = 10MHz to be compliant to the Continuous Array Read function */ -#define AT91C_SPI_CLK 10000000 - -/* AC Characteristics: DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */ -#define DATAFLASH_TCSS (0xFA << 16) -#define DATAFLASH_TCHS (0x8 << 24) - -#define AT91C_TIMEOUT_WRDY 200000 -#define AT91C_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ -#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ - -void AT91F_SpiInit(void) -{ - /* Reset the SPI */ - AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SWRST; - - /* Configure SPI in Master Mode with No CS selected !!! */ - AT91C_BASE_SPI0->SPI_MR = - AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS; - - /* Configure CS0 */ - AT91C_BASE_SPI0->SPI_CSR[0] = - AT91C_SPI_CPOL | - (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | - ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8); -} - -void AT91F_SpiEnable(int cs) -{ - switch (cs) { - case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ - AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF; - AT91C_BASE_SPI0->SPI_MR |= - ((AT91C_SPI_PCS0_DATAFLASH_CARD<<16) & AT91C_SPI_PCS); - break; - case 3: - AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF; - AT91C_BASE_SPI0->SPI_MR |= - ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS); - break; - } - - /* SPI_Enable */ - AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SPIEN; -} - -unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) -{ - unsigned int timeout; - - pDesc->state = BUSY; - - AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; - - /* Initialize the Transmit and Receive Pointer */ - AT91C_BASE_SPI0->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt; - AT91C_BASE_SPI0->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt; - - /* Intialize the Transmit and Receive Counters */ - AT91C_BASE_SPI0->SPI_RCR = pDesc->rx_cmd_size; - AT91C_BASE_SPI0->SPI_TCR = pDesc->tx_cmd_size; - - if (pDesc->tx_data_size != 0) { - /* Initialize the Next Transmit and Next Receive Pointer */ - AT91C_BASE_SPI0->SPI_RNPR = (unsigned int)pDesc->rx_data_pt; - AT91C_BASE_SPI0->SPI_TNPR = (unsigned int)pDesc->tx_data_pt; - - /* Intialize the Next Transmit and Next Receive Counters */ - AT91C_BASE_SPI0->SPI_RNCR = pDesc->rx_data_size; - AT91C_BASE_SPI0->SPI_TNCR = pDesc->tx_data_size; - } - - /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); - timeout = 0; - - AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; - while (!(AT91C_BASE_SPI0->SPI_SR & AT91C_SPI_RXBUFF) && - ((timeout = get_timer_masked()) < CFG_SPI_WRITE_TOUT)); - AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; - pDesc->state = IDLE; - - if (timeout >= CFG_SPI_WRITE_TOUT) { - printf("Error Timeout\n\r"); - return DATAFLASH_ERROR; - } - - return DATAFLASH_OK; -} -#endif diff --git a/cpu/arm926ejs/at91cap9/timer.c b/cpu/arm926ejs/at91cap9/timer.c deleted file mode 100644 index c6df5bd81b8..00000000000 --- a/cpu/arm926ejs/at91cap9/timer.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop leadtechdesign.com> - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -/* - * We're using the AT91CAP9 PITC in 32 bit mode, by - * setting the 20 bit counter period to its maximum (0xfffff). - */ -#define TIMER_LOAD_VAL 0xfffff -#define READ_RESET_TIMER (AT91C_BASE_PITC->PITC_PIVR) -#define READ_TIMER (AT91C_BASE_PITC->PITC_PIIR) -#define TIMER_FREQ (AT91C_MASTER_CLOCK << 4) -#define TICKS_TO_USEC(ticks) ((ticks) / 6) - -ulong get_timer_masked(void); -ulong resettime; - -AT91PS_PITC p_pitc; - -/* nothing really to do with interrupts, just starts up a counter. */ -int timer_init(void) -{ - /* - * Enable PITC Clock - * The clock is already enabled for system controller in boot - */ - AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS; - - /* Enable PITC */ - AT91C_BASE_PITC->PITC_PIMR = AT91C_PITC_PITEN; - - /* Load PITC_PIMR with the right timer value */ - AT91C_BASE_PITC->PITC_PIMR |= TIMER_LOAD_VAL; - - reset_timer_masked(); - - return 0; -} - -/* - * timer without interrupts - */ - -static inline ulong get_timer_raw(void) -{ - ulong now = READ_TIMER; - if (now >= resettime) - return now - resettime; - else - return 0xFFFFFFFFUL - (resettime - now) ; -} - -void reset_timer_masked(void) -{ - resettime = READ_TIMER; -} - -ulong get_timer_masked(void) -{ - return TICKS_TO_USEC(get_timer_raw()); - -} - -void udelay_masked(unsigned long usec) -{ - ulong tmp; - - tmp = get_timer(0); - while (get_timer(tmp) < usec) /* our timer works in usecs */ - ; /* NOP */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - -ulong get_timer(ulong base) -{ - ulong now = get_timer_masked(); - - if (now >= base) - return now - base; - else - return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ; -} - -void udelay(unsigned long usec) -{ - udelay_masked(usec); -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk(void) -{ - ulong tbclk; - tbclk = CFG_HZ; - return tbclk; -} - -/* - * Reset the cpu by setting up the watchdog timer and let him time out - * on the AT91CAP9ADK board - */ -void reset_cpu(ulong ignored) -{ - /* this is the way Linux does it */ - AT91C_BASE_RSTC->RSTC_RCR = (0xA5 << 24) | - AT91C_RSTC_PROCRST | - AT91C_RSTC_PERRST; - - while (1); - /* Never reached */ -} diff --git a/cpu/arm926ejs/at91cap9/usb.c b/cpu/arm926ejs/at91cap9/usb.c deleted file mode 100644 index 69da5f3a92c..00000000000 --- a/cpu/arm926ejs/at91cap9/usb.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * (C) Copyright 2006 - * DENX Software Engineering denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) -#ifdef CONFIG_AT91CAP9 - -#include - -int usb_cpu_init(void) -{ - /* Enable USB host clock. */ - AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UHP; - AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_UHP; - - return 0; -} - -int usb_cpu_stop(void) -{ - /* Disable USB host clock. */ - AT91C_BASE_PMC->PMC_PCDR = 1 << AT91C_ID_UHP; - AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_UHP; - return 0; -} - -int usb_cpu_init_fail(void) -{ - return usb_cpu_stop(); -} - -#endif /* CONFIG_AT91CAP9 */ -#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */ diff --git a/cpu/arm926ejs/at91sam9/Makefile b/cpu/arm926ejs/at91sam9/Makefile new file mode 100644 index 00000000000..bf15e1edb33 --- /dev/null +++ b/cpu/arm926ejs/at91sam9/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000-2008 +# Wolfgang Denk, DENX Software Engineering, wd denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = ether.o timer.o spi.o usb.o +SOBJS = lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm926ejs/at91sam9/config.mk b/cpu/arm926ejs/at91sam9/config.mk new file mode 100644 index 00000000000..ca2cae181bc --- /dev/null +++ b/cpu/arm926ejs/at91sam9/config.mk @@ -0,0 +1,2 @@ +PLATFORM_CPPFLAGS += -march=armv5te +PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,) diff --git a/cpu/arm926ejs/at91sam9/ether.c b/cpu/arm926ejs/at91sam9/ether.c new file mode 100644 index 00000000000..8de1bb7c338 --- /dev/null +++ b/cpu/arm926ejs/at91sam9/ether.c @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop leadtechdesign.com> + * Lead Tech Design + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); + +#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) +void at91sam9_eth_initialize(bd_t *bi) +{ + macb_eth_initialize(0, (void *)AT91C_BASE_MACB, 0x00); +} +#endif diff --git a/cpu/arm926ejs/at91sam9/lowlevel_init.S b/cpu/arm926ejs/at91sam9/lowlevel_init.S new file mode 100644 index 00000000000..40a3f6aaef6 --- /dev/null +++ b/cpu/arm926ejs/at91sam9/lowlevel_init.S @@ -0,0 +1,43 @@ +/* + * AT91CAP9/SAM9 setup stuff + * + * (C) Copyright 2007-2008 + * Stelian Pop leadtechdesign.com> + * Lead Tech Design + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT + +.globl lowlevel_init +lowlevel_init: + + /* + * Clocks/SDRAM initialization is handled by at91bootstrap, + * no need to do it here... + */ + mov pc, lr + + .ltorg + +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/cpu/arm926ejs/at91sam9/spi.c b/cpu/arm926ejs/at91sam9/spi.c new file mode 100644 index 00000000000..0953820bdf6 --- /dev/null +++ b/cpu/arm926ejs/at91sam9/spi.c @@ -0,0 +1,119 @@ +/* + * Driver for ATMEL DataFlash support + * Author : Hamid Ikdoumi (Atmel) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include +#include +#include + +#ifdef CONFIG_HAS_DATAFLASH +#include + +/* Max Value = 10MHz to be compliant to the Continuous Array Read function */ +#define AT91C_SPI_CLK 10000000 + +/* AC Characteristics: DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */ +#define DATAFLASH_TCSS (0xFA << 16) +#define DATAFLASH_TCHS (0x8 << 24) + +#define AT91C_TIMEOUT_WRDY 200000 +#define AT91C_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ +#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ + +void AT91F_SpiInit(void) +{ + /* Reset the SPI */ + AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SWRST; + + /* Configure SPI in Master Mode with No CS selected !!! */ + AT91C_BASE_SPI0->SPI_MR = + AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS; + + /* Configure CS0 */ + AT91C_BASE_SPI0->SPI_CSR[0] = + AT91C_SPI_CPOL | + (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | + ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8); +} + +void AT91F_SpiEnable(int cs) +{ + switch (cs) { + case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ + AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF; + AT91C_BASE_SPI0->SPI_MR |= + ((AT91C_SPI_PCS0_DATAFLASH_CARD<<16) & AT91C_SPI_PCS); + break; + case 3: + AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF; + AT91C_BASE_SPI0->SPI_MR |= + ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS); + break; + } + + /* SPI_Enable */ + AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SPIEN; +} + +unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) +{ + unsigned int timeout; + + pDesc->state = BUSY; + + AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; + + /* Initialize the Transmit and Receive Pointer */ + AT91C_BASE_SPI0->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt; + AT91C_BASE_SPI0->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt; + + /* Intialize the Transmit and Receive Counters */ + AT91C_BASE_SPI0->SPI_RCR = pDesc->rx_cmd_size; + AT91C_BASE_SPI0->SPI_TCR = pDesc->tx_cmd_size; + + if (pDesc->tx_data_size != 0) { + /* Initialize the Next Transmit and Next Receive Pointer */ + AT91C_BASE_SPI0->SPI_RNPR = (unsigned int)pDesc->rx_data_pt; + AT91C_BASE_SPI0->SPI_TNPR = (unsigned int)pDesc->tx_data_pt; + + /* Intialize the Next Transmit and Next Receive Counters */ + AT91C_BASE_SPI0->SPI_RNCR = pDesc->rx_data_size; + AT91C_BASE_SPI0->SPI_TNCR = pDesc->tx_data_size; + } + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked(); + timeout = 0; + + AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; + while (!(AT91C_BASE_SPI0->SPI_SR & AT91C_SPI_RXBUFF) && + ((timeout = get_timer_masked()) < CFG_SPI_WRITE_TOUT)); + AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; + pDesc->state = IDLE; + + if (timeout >= CFG_SPI_WRITE_TOUT) { + printf("Error Timeout\n\r"); + return DATAFLASH_ERROR; + } + + return DATAFLASH_OK; +} +#endif diff --git a/cpu/arm926ejs/at91sam9/timer.c b/cpu/arm926ejs/at91sam9/timer.c new file mode 100644 index 00000000000..79c135fad4f --- /dev/null +++ b/cpu/arm926ejs/at91sam9/timer.c @@ -0,0 +1,148 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop leadtechdesign.com> + * Lead Tech Design + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +/* + * We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by + * setting the 20 bit counter period to its maximum (0xfffff). + */ +#define TIMER_LOAD_VAL 0xfffff +#define READ_RESET_TIMER (AT91C_BASE_PITC->PITC_PIVR) +#define READ_TIMER (AT91C_BASE_PITC->PITC_PIIR) +#define TIMER_FREQ (AT91C_MASTER_CLOCK << 4) +#define TICKS_TO_USEC(ticks) ((ticks) / 6) + +ulong get_timer_masked(void); +ulong resettime; + +AT91PS_PITC p_pitc; + +/* nothing really to do with interrupts, just starts up a counter. */ +int timer_init(void) +{ + /* + * Enable PITC Clock + * The clock is already enabled for system controller in boot + */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS; + + /* Enable PITC */ + AT91C_BASE_PITC->PITC_PIMR = AT91C_PITC_PITEN; + + /* Load PITC_PIMR with the right timer value */ + AT91C_BASE_PITC->PITC_PIMR |= TIMER_LOAD_VAL; + + reset_timer_masked(); + + return 0; +} + +/* + * timer without interrupts + */ + +static inline ulong get_timer_raw(void) +{ + ulong now = READ_TIMER; + if (now >= resettime) + return now - resettime; + else + return 0xFFFFFFFFUL - (resettime - now) ; +} + +void reset_timer_masked(void) +{ + resettime = READ_TIMER; +} + +ulong get_timer_masked(void) +{ + return TICKS_TO_USEC(get_timer_raw()); + +} + +void udelay_masked(unsigned long usec) +{ + ulong tmp; + + tmp = get_timer(0); + while (get_timer(tmp) < usec) /* our timer works in usecs */ + ; /* NOP */ +} + +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + ulong now = get_timer_masked(); + + if (now >= base) + return now - base; + else + return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ; +} + +void udelay(unsigned long usec) +{ + udelay_masked(usec); +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + ulong tbclk; + tbclk = CFG_HZ; + return tbclk; +} + +/* + * Reset the cpu by setting up the watchdog timer and let him time out. + */ +void reset_cpu(ulong ignored) +{ + /* this is the way Linux does it */ + AT91C_BASE_RSTC->RSTC_RCR = (0xA5 << 24) | + AT91C_RSTC_PROCRST | + AT91C_RSTC_PERRST; + + while (1); + /* Never reached */ +} diff --git a/cpu/arm926ejs/at91sam9/usb.c b/cpu/arm926ejs/at91sam9/usb.c new file mode 100644 index 00000000000..09292a6bed0 --- /dev/null +++ b/cpu/arm926ejs/at91sam9/usb.c @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2006 + * DENX Software Engineering denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) + +#include + +int usb_cpu_init(void) +{ + /* Enable USB host clock. */ + AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UHP; + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_UHP; + + return 0; +} + +int usb_cpu_stop(void) +{ + /* Disable USB host clock. */ + AT91C_BASE_PMC->PMC_PCDR = 1 << AT91C_ID_UHP; + AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_UHP; + return 0; +} + +int usb_cpu_init_fail(void) +{ + return usb_cpu_stop(); +} + +#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */ -- cgit v1.2.3 From 983c1db04c1dd0f92e02f06d29f0c65a3d9a2687 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Wed, 26 Mar 2008 20:52:32 +0100 Subject: Port AT91CAP9 to the new headers Adapt the existing AT91CAP9 code to the new headers and APIs. Signed-off-by: Stelian Pop --- cpu/arm926ejs/at91sam9/ether.c | 2 +- cpu/arm926ejs/at91sam9/spi.c | 119 +++++++++++++++++++++++++++-------------- cpu/arm926ejs/at91sam9/timer.c | 25 ++++----- cpu/arm926ejs/at91sam9/usb.c | 10 ++-- 4 files changed, 100 insertions(+), 56 deletions(-) (limited to 'cpu/arm926ejs') diff --git a/cpu/arm926ejs/at91sam9/ether.c b/cpu/arm926ejs/at91sam9/ether.c index 8de1bb7c338..e4f56012aa1 100644 --- a/cpu/arm926ejs/at91sam9/ether.c +++ b/cpu/arm926ejs/at91sam9/ether.c @@ -30,6 +30,6 @@ extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); #if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) void at91sam9_eth_initialize(bd_t *bi) { - macb_eth_initialize(0, (void *)AT91C_BASE_MACB, 0x00); + macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00); } #endif diff --git a/cpu/arm926ejs/at91sam9/spi.c b/cpu/arm926ejs/at91sam9/spi.c index 0953820bdf6..c8196082952 100644 --- a/cpu/arm926ejs/at91sam9/spi.c +++ b/cpu/arm926ejs/at91sam9/spi.c @@ -19,94 +19,135 @@ * */ -#include #include -#include +#include +#include +#include +#include +#include #ifdef CONFIG_HAS_DATAFLASH #include -/* Max Value = 10MHz to be compliant to the Continuous Array Read function */ -#define AT91C_SPI_CLK 10000000 - -/* AC Characteristics: DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */ -#define DATAFLASH_TCSS (0xFA << 16) -#define DATAFLASH_TCHS (0x8 << 24) - -#define AT91C_TIMEOUT_WRDY 200000 -#define AT91C_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ -#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ +#define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ +#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 0: NPCS0%1101 */ +#define AT91_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ void AT91F_SpiInit(void) { /* Reset the SPI */ - AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SWRST; + writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR); /* Configure SPI in Master Mode with No CS selected !!! */ - AT91C_BASE_SPI0->SPI_MR = - AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS; + writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS, + AT91_BASE_SPI + AT91_SPI_MR); /* Configure CS0 */ - AT91C_BASE_SPI0->SPI_CSR[0] = - AT91C_SPI_CPOL | - (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | - ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8); + writel(AT91_SPI_NCPHA | + (AT91_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | + ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + AT91_BASE_SPI + AT91_SPI_CSR(0)); + +#ifdef CFG_DATAFLASH_LOGIC_ADDR_CS1 + /* Configure CS1 */ + writel(AT91_SPI_NCPHA | + (AT91_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | + ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + AT91_BASE_SPI + AT91_SPI_CSR(1)); +#endif + +#ifdef CFG_DATAFLASH_LOGIC_ADDR_CS3 + /* Configure CS3 */ + writel(AT91_SPI_NCPHA | + (AT91_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | + ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + AT91_BASE_SPI + AT91_SPI_CSR(3)); +#endif + + /* SPI_Enable */ + writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR); + + while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_SPIENS)); + + /* + * Add tempo to get SPI in a safe state. + * Should not be needed for new silicon (Rev B) + */ + udelay(500000); + readl(AT91_BASE_SPI + AT91_SPI_SR); + readl(AT91_BASE_SPI + AT91_SPI_RDR); + } void AT91F_SpiEnable(int cs) { + unsigned long mode; switch (cs) { case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ - AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF; - AT91C_BASE_SPI0->SPI_MR |= - ((AT91C_SPI_PCS0_DATAFLASH_CARD<<16) & AT91C_SPI_PCS); + mode = readl(AT91_BASE_SPI + AT91_SPI_MR); + mode &= 0xFFF0FFFF; + writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS), + AT91_BASE_SPI + AT91_SPI_MR); + break; + case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */ + mode = readl(AT91_BASE_SPI + AT91_SPI_MR); + mode &= 0xFFF0FFFF; + writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS), + AT91_BASE_SPI + AT91_SPI_MR); break; case 3: - AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF; - AT91C_BASE_SPI0->SPI_MR |= - ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS); + mode = readl(AT91_BASE_SPI + AT91_SPI_MR); + mode &= 0xFFF0FFFF; + writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS), + AT91_BASE_SPI + AT91_SPI_MR); break; } /* SPI_Enable */ - AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SPIEN; + writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR); } +unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc); + unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) { unsigned int timeout; + pDesc->state = BUSY; - AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; + writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); + /* Initialize the Transmit and Receive Pointer */ - AT91C_BASE_SPI0->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt; - AT91C_BASE_SPI0->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt; + writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR); + writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR); /* Intialize the Transmit and Receive Counters */ - AT91C_BASE_SPI0->SPI_RCR = pDesc->rx_cmd_size; - AT91C_BASE_SPI0->SPI_TCR = pDesc->tx_cmd_size; + writel(pDesc->rx_cmd_size, AT91_BASE_SPI + AT91_SPI_RCR); + writel(pDesc->tx_cmd_size, AT91_BASE_SPI + AT91_SPI_TCR); if (pDesc->tx_data_size != 0) { /* Initialize the Next Transmit and Next Receive Pointer */ - AT91C_BASE_SPI0->SPI_RNPR = (unsigned int)pDesc->rx_data_pt; - AT91C_BASE_SPI0->SPI_TNPR = (unsigned int)pDesc->tx_data_pt; + writel((unsigned int)pDesc->rx_data_pt, AT91_BASE_SPI + AT91_SPI_RNPR); + writel((unsigned int)pDesc->tx_data_pt, AT91_BASE_SPI + AT91_SPI_TNPR); /* Intialize the Next Transmit and Next Receive Counters */ - AT91C_BASE_SPI0->SPI_RNCR = pDesc->rx_data_size; - AT91C_BASE_SPI0->SPI_TNCR = pDesc->tx_data_size; + writel(pDesc->rx_data_size, AT91_BASE_SPI + AT91_SPI_RNCR); + writel(pDesc->tx_data_size, AT91_BASE_SPI + AT91_SPI_TNCR); } /* arm simple, non interrupt dependent timer */ reset_timer_masked(); timeout = 0; - AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; - while (!(AT91C_BASE_SPI0->SPI_SR & AT91C_SPI_RXBUFF) && + writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR); + while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_RXBUFF) && ((timeout = get_timer_masked()) < CFG_SPI_WRITE_TOUT)); - AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; + writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); pDesc->state = IDLE; if (timeout >= CFG_SPI_WRITE_TOUT) { diff --git a/cpu/arm926ejs/at91sam9/timer.c b/cpu/arm926ejs/at91sam9/timer.c index 79c135fad4f..4e794662865 100644 --- a/cpu/arm926ejs/at91sam9/timer.c +++ b/cpu/arm926ejs/at91sam9/timer.c @@ -24,22 +24,24 @@ #include #include +#include +#include +#include +#include /* * We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by * setting the 20 bit counter period to its maximum (0xfffff). */ #define TIMER_LOAD_VAL 0xfffff -#define READ_RESET_TIMER (AT91C_BASE_PITC->PITC_PIVR) -#define READ_TIMER (AT91C_BASE_PITC->PITC_PIIR) +#define READ_RESET_TIMER at91_sys_read(AT91_PIT_PIVR) +#define READ_TIMER at91_sys_read(AT91_PIT_PIIR) #define TIMER_FREQ (AT91C_MASTER_CLOCK << 4) #define TICKS_TO_USEC(ticks) ((ticks) / 6) ulong get_timer_masked(void); ulong resettime; -AT91PS_PITC p_pitc; - /* nothing really to do with interrupts, just starts up a counter. */ int timer_init(void) { @@ -47,13 +49,10 @@ int timer_init(void) * Enable PITC Clock * The clock is already enabled for system controller in boot */ - AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS; + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); /* Enable PITC */ - AT91C_BASE_PITC->PITC_PIMR = AT91C_PITC_PITEN; - - /* Load PITC_PIMR with the right timer value */ - AT91C_BASE_PITC->PITC_PIMR |= TIMER_LOAD_VAL; + at91_sys_write(AT91_PIT_MR, TIMER_LOAD_VAL | AT91_PIT_PITEN); reset_timer_masked(); @@ -67,6 +66,7 @@ int timer_init(void) static inline ulong get_timer_raw(void) { ulong now = READ_TIMER; + if (now >= resettime) return now - resettime; else @@ -129,6 +129,7 @@ unsigned long long get_ticks(void) ulong get_tbclk(void) { ulong tbclk; + tbclk = CFG_HZ; return tbclk; } @@ -139,9 +140,9 @@ ulong get_tbclk(void) void reset_cpu(ulong ignored) { /* this is the way Linux does it */ - AT91C_BASE_RSTC->RSTC_RCR = (0xA5 << 24) | - AT91C_RSTC_PROCRST | - AT91C_RSTC_PERRST; + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | + AT91_RSTC_PROCRST | + AT91_RSTC_PERRST); while (1); /* Never reached */ diff --git a/cpu/arm926ejs/at91sam9/usb.c b/cpu/arm926ejs/at91sam9/usb.c index 09292a6bed0..d678897dc71 100644 --- a/cpu/arm926ejs/at91sam9/usb.c +++ b/cpu/arm926ejs/at91sam9/usb.c @@ -26,12 +26,14 @@ #if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) #include +#include +#include int usb_cpu_init(void) { /* Enable USB host clock. */ - AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UHP; - AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_UHP; + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP); + at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP); return 0; } @@ -39,8 +41,8 @@ int usb_cpu_init(void) int usb_cpu_stop(void) { /* Disable USB host clock. */ - AT91C_BASE_PMC->PMC_PCDR = 1 << AT91C_ID_UHP; - AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_UHP; + at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP); + at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP); return 0; } -- cgit v1.2.3 From 1762f13b4aab88b685b1722f17dada247945624b Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 31 Mar 2008 21:20:49 +0200 Subject: AT91SAM9: Move CONFIG_HAS_DATAFLASH to Makefile Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- cpu/arm926ejs/at91sam9/Makefile | 9 ++++++--- cpu/arm926ejs/at91sam9/spi.c | 5 +---- 2 files changed, 7 insertions(+), 7 deletions(-) (limited to 'cpu/arm926ejs') diff --git a/cpu/arm926ejs/at91sam9/Makefile b/cpu/arm926ejs/at91sam9/Makefile index bf15e1edb33..203abc28e14 100644 --- a/cpu/arm926ejs/at91sam9/Makefile +++ b/cpu/arm926ejs/at91sam9/Makefile @@ -25,11 +25,14 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a -COBJS = ether.o timer.o spi.o usb.o +COBJS-y += ether.o +COBJS-y += timer.o +COBJS-$(CONFIG_HAS_DATAFLASH) +=spi.o +COBJS-y += usb.o SOBJS = lowlevel_init.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) all: $(obj).depend $(LIB) diff --git a/cpu/arm926ejs/at91sam9/spi.c b/cpu/arm926ejs/at91sam9/spi.c index c8196082952..c9fe6d8a3fc 100644 --- a/cpu/arm926ejs/at91sam9/spi.c +++ b/cpu/arm926ejs/at91sam9/spi.c @@ -26,7 +26,6 @@ #include #include -#ifdef CONFIG_HAS_DATAFLASH #include #define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ @@ -85,6 +84,7 @@ void AT91F_SpiInit(void) void AT91F_SpiEnable(int cs) { unsigned long mode; + switch (cs) { case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ mode = readl(AT91_BASE_SPI + AT91_SPI_MR); @@ -116,12 +116,10 @@ unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) { unsigned int timeout; - pDesc->state = BUSY; writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); - /* Initialize the Transmit and Receive Pointer */ writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR); writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR); @@ -157,4 +155,3 @@ unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) return DATAFLASH_OK; } -#endif -- cgit v1.2.3