From 48a38f37da4982aef67bfd352889d4054e97cb8a Mon Sep 17 00:00:00 2001 From: Jayesh Choudhary Date: Tue, 23 Jan 2024 13:47:31 +0530 Subject: configs: j722s_evm_r5_defconfig: Increase SPL size MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Increase the SPL_MAX_SIZE to 0x6ce00 as J7AEN SRAM has larger loadable memory space for SBL (0x7e000). This also ensures that the SPL does not go beyond the limit while having a single defconfig for different boot modes. Correspondingly, increase CONFIG_SPL_BSS_START_ADDR from 0x43c4b000 to 0x43c7b000 ensuring no overlap in memory. SRAM memory allocation map: ┌─────────────────────────────────────┐ (0x43c00000) │ SPL (0x6ce00) │ ├─────────────────────────────────────┤ (0x43c6ce00) │ EMPTY (0x50) │ ├─────────────────────────────────────┤ (0x43C6CE50) │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x5000 │ ├─────────────────────────────────────┤ (0x43C71E50) │ Global data │ │ sizeof(struct global_data) = 0x1ac | | (+0x4) │ ├─────────────────────────────────────┤ (0x43C72000) │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x9000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x43c7b000) │ CONFIG_SPL_BSS_MAX_SIZE = 0x3000 │ ├─────────────────────────────────────┤ (0x43c7e000) │ ROM Boot parameter table │ └─────────────────────────────────────┘CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x43c7f290) Fixes: b5d58d70642f ("configs: introduce configs needed for the J722S") Signed-off-by: Jayesh Choudhary --- configs/j722s_evm_r5_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'configs/j722s_evm_r5_defconfig') diff --git a/configs/j722s_evm_r5_defconfig b/configs/j722s_evm_r5_defconfig index c131ccc6dd..9860fa8d62 100644 --- a/configs/j722s_evm_r5_defconfig +++ b/configs/j722s_evm_r5_defconfig @@ -32,10 +32,10 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y -CONFIG_SPL_MAX_SIZE=0x3B000 +CONFIG_SPL_MAX_SIZE=0x6ce00 CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x43c4b000 +CONFIG_SPL_BSS_START_ADDR=0x43c7b000 CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -- cgit v1.2.3