From 297bb9e0fc7049c7771feed5e11cf6db89b19f27 Mon Sep 17 00:00:00 2001 From: Philipp Tomsich Date: Fri, 28 Oct 2016 18:21:28 +0800 Subject: sunxi: DRAM initialisation for sun9i This adds DRAM initialisation code for sun9i, which calculates the appropriate timings based on timing information for the supplied DDR3 bin and the clock speeds used. With this DRAM setup, we have verified DDR3 clocks of up to 792MHz (i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration. [wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup] Signed-off-by: Chen-Yu Tsai [hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks] [hdegoede@redhat.com: Fix checkpatch warnings] Signed-off-by: Hans de Goede --- board/sunxi/Kconfig | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'board/sunxi/Kconfig') diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index c0ffeb3333f..a126c3e3014 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -141,11 +141,13 @@ config DRAM_TYPE config DRAM_CLK int "sunxi dram clock speed" + default 792 if MACH_SUN9I default 312 if MACH_SUN6I || MACH_SUN8I default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I ---help--- - Set the dram clock speed, valid range 240 - 480, must be a multiple - of 24. + Set the dram clock speed, valid range 240 - 480 (prior to sun9i), + must be a multiple of 24. For the sun9i (A80), the tested values + (for DDR3-1600) are 312 to 792. if MACH_SUN5I || MACH_SUN7I config DRAM_MBUS_CLK -- cgit v1.2.3