From e7ee23ec1788d8cf269a4cf6b9cd3722cbc7d592 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Fri, 17 Jul 2009 10:14:45 -0500 Subject: 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fields Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match the 86xx user's manual and other Freescale architectures Signed-off-by: Peter Tyser Signed-off-by: Kumar Gala --- board/sbc8641d/sbc8641d.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'board/sbc8641d/sbc8641d.c') diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index c39d2c020c..f118a6eaa6 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -127,9 +127,9 @@ long int fixed_sdram (void) ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; - ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CFG_1A; + ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1A; ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CFG_2; - ddr->sdram_mode_1 = CONFIG_SYS_DDR_MODE_1; + ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2; ddr->sdram_mode_cntl = CONFIG_SYS_DDR_MODE_CTL; ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; @@ -140,7 +140,7 @@ long int fixed_sdram (void) udelay (500); - ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CFG_1B; + ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1B; asm ("sync; isync"); udelay (500); @@ -158,9 +158,9 @@ long int fixed_sdram (void) ddr->timing_cfg_0 = CONFIG_SYS_DDR2_TIMING_0; ddr->timing_cfg_1 = CONFIG_SYS_DDR2_TIMING_1; ddr->timing_cfg_2 = CONFIG_SYS_DDR2_TIMING_2; - ddr->sdram_cfg_1 = CONFIG_SYS_DDR2_CFG_1A; + ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1A; ddr->sdram_cfg_2 = CONFIG_SYS_DDR2_CFG_2; - ddr->sdram_mode_1 = CONFIG_SYS_DDR2_MODE_1; + ddr->sdram_mode = CONFIG_SYS_DDR2_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR2_MODE_2; ddr->sdram_mode_cntl = CONFIG_SYS_DDR2_MODE_CTL; ddr->sdram_interval = CONFIG_SYS_DDR2_INTERVAL; @@ -171,7 +171,7 @@ long int fixed_sdram (void) udelay (500); - ddr->sdram_cfg_1 = CONFIG_SYS_DDR2_CFG_1B; + ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1B; asm ("sync; isync"); udelay (500); -- cgit v1.2.3