From 0764c164fed6277d359cf132d55187ea34290114 Mon Sep 17 00:00:00 2001 From: Vlad Lungu Date: Wed, 16 Jan 2008 19:27:51 +0200 Subject: MIPS:Target support for qemu -M mips With serial, NE2000, IDE support. Tested in big-endian mode. Memory size hard-coded to 128M for now, so don't play with the -m option. Signed-off-by: Vlad Lungu --- board/qemu-mips/lowlevel_init.S | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 board/qemu-mips/lowlevel_init.S (limited to 'board/qemu-mips/lowlevel_init.S') diff --git a/board/qemu-mips/lowlevel_init.S b/board/qemu-mips/lowlevel_init.S new file mode 100644 index 0000000000..28166bceba --- /dev/null +++ b/board/qemu-mips/lowlevel_init.S @@ -0,0 +1,41 @@ +/* Memory sub-system initialization code */ + +#include +#include +#include +#include + + .text + .set noreorder + .set mips32 + + .globl lowlevel_init +lowlevel_init: + + /* + * Step 2) Establish Status Register + * (set BEV, clear ERL, clear EXL, clear IE) + */ + li t1, 0x00400000 + mtc0 t1, CP0_STATUS + + /* + * Step 3) Establish CP0 Config0 + * (set K0=3) + */ + li t1, 0x00000003 + mtc0 t1, CP0_CONFIG + + /* + * Step 7) Establish Cause + * (set IV bit) + */ + li t1, 0x00800000 + mtc0 t1, CP0_CAUSE + + /* Establish Wired (and Random) */ + mtc0 zero, CP0_WIRED + nop + + j ra + nop -- cgit v1.2.3