From e35745bb64fae64da3e1fa7f4afe3213287f5908 Mon Sep 17 00:00:00 2001 From: wdenk Date: Sun, 18 Apr 2004 23:32:11 +0000 Subject: * Temporarily disabled John Kerl's extended MII command code because "miivals.h" is missing * Patches by Mark Jonas, 13 Apr 2004: - Remove CS0 chip select timing setting from cpu/mpc5xxx/start.S - Add sync instructions to IceCube SDRAM init code - Move SDRAM chip constants into seperate include files - Unify DDR and SDR initialization code - Unify all IceCube (Lite5xxx) target names --- board/icecube/mt48lc16m16a2-75.h | 43 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 board/icecube/mt48lc16m16a2-75.h (limited to 'board/icecube/mt48lc16m16a2-75.h') diff --git a/board/icecube/mt48lc16m16a2-75.h b/board/icecube/mt48lc16m16a2-75.h new file mode 100644 index 00000000000..ffdf0396a54 --- /dev/null +++ b/board/icecube/mt48lc16m16a2-75.h @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define SDRAM_DDR 0 /* is SDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE 0x00CD0000 +#define SDRAM_CONTROL 0x504F0000 +#define SDRAM_CONFIG1 0xD2322800 +#define SDRAM_CONFIG2 0x8AD70000 + +#elif defined(CONFIG_MGT5100) +/* Settings for XLB = 66 MHz */ +#define SDRAM_MODE 0x008D0000 +#define SDRAM_CONTROL 0x504F0000 +#define SDRAM_CONFIG1 0xC2222600 +#define SDRAM_CONFIG2 0x88B70004 +#define SDRAM_ADDRSEL 0x02000000 + +#else +#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined +#endif -- cgit v1.2.3