From 8b4f9afac0642cea73084401d07f791f2ac63104 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Wed, 15 Apr 2015 16:24:23 +0530 Subject: ARM: vf610: Enable external 32KHz oscillator Enable the SCSC (Slow Clock Source Controller) and select the external 32KHz oscillator. This improves the accuracy of the RTC. Signed-off-by: Sanchayan Maity --- board/freescale/vf610twr/vf610twr.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'board/freescale/vf610twr') diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c index eb27542375..4160acdcc9 100644 --- a/board/freescale/vf610twr/vf610twr.c +++ b/board/freescale/vf610twr/vf610twr.c @@ -227,7 +227,7 @@ static void clock_init(void) CCM_CCGR2_PORTD_CTRL_MASK | CCM_CCGR2_PORTE_CTRL_MASK | CCM_CCGR2_QSPI0_CTRL_MASK); clrsetbits_le32(&ccm->ccgr3, CCM_REG_CTRL_MASK, - CCM_CCGR3_ANADIG_CTRL_MASK); + CCM_CCGR3_ANADIG_CTRL_MASK | CCM_CCGR3_SCSC_CTRL_MASK); clrsetbits_le32(&ccm->ccgr4, CCM_REG_CTRL_MASK, CCM_CCGR4_WKUP_CTRL_MASK | CCM_CCGR4_CCM_CTRL_MASK | CCM_CCGR4_GPC_CTRL_MASK | CCM_CCGR4_I2C0_CTRL_MASK); @@ -308,9 +308,20 @@ int board_early_init_f(void) int board_init(void) { + struct scsc_reg *scsc = (struct scsc_reg *)SCSC_BASE_ADDR; + /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + /* + * Enable external 32K Oscillator + * + * The internal clock experiences significant drift + * so we must use the external oscillator in order + * to maintain correct time in the hwclock + */ + setbits_le32(&scsc->sosc_ctr, SCSC_SOSC_CTR_SOSC_EN); + return 0; } -- cgit v1.2.3