From 394c46caf965f47717a952a09a51b73c2cb473b3 Mon Sep 17 00:00:00 2001 From: york Date: Fri, 2 Jul 2010 22:25:58 +0000 Subject: powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfig Enabled SPD Enabled DDR2 Enabled hwconfig Signed-off-by: York Sun --- board/freescale/p2020ds/p2020ds.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'board/freescale/p2020ds/p2020ds.c') diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index 3fd1b347abb..608ff916da8 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -69,13 +69,16 @@ int checkboard(void) return 0; } +const char *board_hwconfig = "foo:bar=baz"; +const char *cpu_hwconfig = "foo:bar=baz"; + phys_size_t initdram(int board_type) { phys_size_t dram_size = 0; puts("Initializing...."); -#ifdef CONFIG_SPD_EEPROM +#ifdef CONFIG_DDR_SPD dram_size = fsl_ddr_sdram(); #else dram_size = fixed_sdram(); @@ -94,7 +97,7 @@ phys_size_t initdram(int board_type) return dram_size; } -#if !defined(CONFIG_SPD_EEPROM) +#if !defined(CONFIG_DDR_SPD) /* * Fixed sdram init -- doesn't use serial presence detect. */ -- cgit v1.2.3