From abc7d0f75c078524f713cb2d4b4efe1b1a122c60 Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Thu, 28 Jan 2016 15:38:15 +0800 Subject: armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie Reviewed-by: York Sun --- board/freescale/ls2080ardb/ls2080ardb.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'board/freescale/ls2080ardb') diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index c63b639625..12638dfb14 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -149,6 +149,7 @@ int board_init(void) { char *env_hwconfig; u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE; + u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE; u32 val; init_final_memctl_regs(); @@ -170,6 +171,9 @@ int board_init(void) QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN); + /* invert AQR405 IRQ pins polarity */ + out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); + return 0; } -- cgit v1.2.3