From ebe4c1e6469444753bd2ba93fe63e6183cf2905c Mon Sep 17 00:00:00 2001 From: Claudiu Manoil Date: Wed, 12 Aug 2015 13:29:14 +0300 Subject: ls102xa: etsec: Use proper settings for BE BDs Replace the DMACTRL[LE] hack with recommended settings for ETSECDMAMCR to get the same end effect - obtaining big-endian buffer descriptors and frame data for eTSEC. The reset / default value for ETSECDMAMCR is preserved, excepting the BD and FR bits which are cleared to enable the BE mode in accordance with the H/W specifications. Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA" Signed-off-by: Claudiu Manoil Acked-by: Alison Wang Tested-by: Alison Wang Reviewed-by: York Sun --- board/freescale/ls1021atwr/ls1021atwr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'board/freescale/ls1021atwr') diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index b7458a9e99..006700f420 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -481,7 +481,8 @@ int board_early_init_f(void) unsigned int major; #ifdef CONFIG_TSEC_ENET - out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); + /* clear BD & FR bits for BE BD's and frame data */ + clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125); #endif -- cgit v1.2.3