From a371cd8fe159132bdd9bf08b8b9a4a5f08b11387 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 3 Jan 2012 13:27:34 -0800 Subject: CHROMIUMOS: Issue SMI to finalize Coreboot in final stage This will write magic value to APMC command port which will trigger an SMI and cause coreboot to lock down the ME, chipset, and CPU. BUG=chrome-os-partner:6609 TEST=boot on stumpy+celeron and lumpy+i5 and ensure the system still boots and that registers are locked Signed-off-by: Duncan Laurie Change-Id: Ib30ea83044f5123205531a5e8ee88ee37de2dd86 Reviewed-on: https://gerrit.chromium.org/gerrit/13604 Reviewed-by: Stefan Reinauer --- board/chromebook-x86/coreboot/coreboot.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'board/chromebook-x86') diff --git a/board/chromebook-x86/coreboot/coreboot.c b/board/chromebook-x86/coreboot/coreboot.c index 06c610c131b..2b3d11b12ea 100644 --- a/board/chromebook-x86/coreboot/coreboot.c +++ b/board/chromebook-x86/coreboot/coreboot.c @@ -272,6 +272,10 @@ int board_final_cleanup(void) enable_cache(); } + /* Issue SMI to Coreboot to lock down ME and registers */ + printf("Finalizing Coreboot\n"); + outb(0xcb, 0xb2); + return 0; } -- cgit v1.2.3