From a52d2f816dac9cf516b4c795d44ce42cbe6aacb3 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Fri, 11 Feb 2011 01:25:30 -0600 Subject: powerpc/85xx: Add P1021 specific QE and UEC support P1021 has some QE pins which need to be set in pmuxcr register before using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and UCC5 in Eth mode. QE9 and QE12 are set for MII management. QE12 needs to be released after MII access because QE12 pin is muxed with LBCTL signal. Also added relevant QE support defines unique to P1021. The P1021 QE is shared on P1012, P1016, and P1025. Signed-off-by: Haiying Wang Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/speed.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/cpu') diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index e530494102b..c4c156d7372 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -28,6 +28,7 @@ #include #include +#include #include #include @@ -156,7 +157,7 @@ void get_sys_info (sys_info_t * sysInfo) #endif int i; #ifdef CONFIG_QE - u32 qe_ratio; + __maybe_unused u32 qe_ratio; #endif plat_ratio = (gur->porpllsr) & 0x0000003e; @@ -184,10 +185,15 @@ void get_sys_info (sys_info_t * sysInfo) #endif #ifdef CONFIG_QE +#if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ + defined(CONFIG_P1021) || defined(CONFIG_P1025) + sysInfo->freqQE = sysInfo->freqSystemBus; +#else qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO) >> MPC85xx_PORPLLSR_QE_RATIO_SHIFT; sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ; #endif +#endif #ifdef CONFIG_SYS_DPAA_FMAN sysInfo->freqFMan[0] = sysInfo->freqSystemBus; -- cgit v1.2.3