From 3483f28ebfaf968112ede2f075b9769a007cacdd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Sat, 20 Jan 2018 19:16:04 +0100 Subject: MIPS: add support for Broadcom MIPS BCM6318 SoC family MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Daniel Schwierzeck --- arch/mips/dts/brcm,bcm6318.dtsi | 157 ++++++++++++++++++++++++++++++++++++++++ arch/mips/mach-bmips/Kconfig | 12 +++ 2 files changed, 169 insertions(+) create mode 100644 arch/mips/dts/brcm,bcm6318.dtsi (limited to 'arch/mips') diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi new file mode 100644 index 0000000000..54964a7009 --- /dev/null +++ b/arch/mips/dts/brcm,bcm6318.dtsi @@ -0,0 +1,157 @@ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include "skeleton.dtsi" + +/ { + compatible = "brcm,bcm6318"; + + aliases { + spi0 = &spi; + }; + + cpus { + reg = <0x10000000 0x4>; + #address-cells = <1>; + #size-cells = <0>; + u-boot,dm-pre-reloc; + + cpu@0 { + compatible = "brcm,bcm6318-cpu", "mips,mips4Kc"; + device_type = "cpu"; + reg = <0>; + u-boot,dm-pre-reloc; + }; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + }; + + periph_osc: periph-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + u-boot,dm-pre-reloc; + }; + + periph_clk: periph-clk { + compatible = "brcm,bcm6345-clk"; + reg = <0x10000004 0x4>; + #clock-cells = <1>; + }; + }; + + ubus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + periph_rst: reset-controller@10000010 { + compatible = "brcm,bcm6345-reset"; + reg = <0x10000010 0x4>; + #reset-cells = <1>; + }; + + wdt: watchdog@10000068 { + compatible = "brcm,bcm6345-wdt"; + reg = <0x10000068 0xc>; + clocks = <&periph_osc>; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdt>; + }; + + pll_cntl: syscon@10000074 { + compatible = "syscon"; + reg = <0x10000074 0x4>; + }; + + syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&pll_cntl>; + offset = <0x0>; + mask = <0x1>; + }; + + gpio1: gpio-controller@10000080 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x10000080 0x4>, <0x10000088 0x4>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <18>; + + status = "disabled"; + }; + + gpio0: gpio-controller@10000084 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x10000084 0x4>, <0x1000008c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + uart0: serial@10000100 { + compatible = "brcm,bcm6345-uart"; + reg = <0x10000100 0x18>; + clocks = <&periph_osc>; + + status = "disabled"; + }; + + leds: led-controller@10000200 { + compatible = "brcm,bcm6328-leds"; + reg = <0x10000200 0x28>; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + periph_pwr: power-controller@100008e8 { + compatible = "brcm,bcm6328-power-domain"; + reg = <0x100008e8 0x4>; + #power-domain-cells = <1>; + }; + + spi: spi@10003000 { + compatible = "brcm,bcm6328-hsspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10003000 0x600>; + clocks = <&periph_clk BCM6318_CLK_HSSPI>, <&hsspi_pll>; + clock-names = "hsspi", "pll"; + resets = <&periph_rst BCM6318_RST_SPI>; + spi-max-frequency = <33333334>; + num-cs = <3>; + + status = "disabled"; + }; + + memory-controller@10004000 { + compatible = "brcm,bcm6318-mc"; + reg = <0x10004000 0x38>; + u-boot,dm-pre-reloc; + }; + }; +}; diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig index 936b67f5f2..c9b56f5ca7 100644 --- a/arch/mips/mach-bmips/Kconfig +++ b/arch/mips/mach-bmips/Kconfig @@ -6,6 +6,7 @@ config SYS_MALLOC_F_LEN config SYS_SOC default "bcm3380" if SOC_BMIPS_BCM3380 + default "bcm6318" if SOC_BMIPS_BCM6318 default "bcm6328" if SOC_BMIPS_BCM6328 default "bcm6338" if SOC_BMIPS_BCM6338 default "bcm6348" if SOC_BMIPS_BCM6348 @@ -27,6 +28,17 @@ config SOC_BMIPS_BCM3380 help This supports BMIPS BCM3380 family. +config SOC_BMIPS_BCM6318 + bool "BMIPS BCM6318 family" + select SUPPORTS_BIG_ENDIAN + select SUPPORTS_CPU_MIPS32_R1 + select MIPS_TUNE_4KC + select MIPS_L1_CACHE_SHIFT_4 + select SWAP_IO_SPACE + select SYSRESET_SYSCON + help + This supports BMIPS BCM6318 family. + config SOC_BMIPS_BCM6328 bool "BMIPS BCM6328 family" select SUPPORTS_BIG_ENDIAN -- cgit v1.2.3