From 2cea8d74dc3a80bbc06aff6b6dcaceb806d563b4 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Wed, 19 Sep 2018 13:01:55 +0200 Subject: imx: mx7: fix potential overflow in imx_ddr_size() The imx_ddr_size() function may overflow as it is possible to kind of over provision the DDR controller. Fix this by capping it to 2 GB which is the maximum allowed size as per reference manual. Signed-off-by: Marcel Ziswiler Reviewed-by: Fabio Estevam --- arch/arm/mach-imx/mx7/ddr.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c index f19aeb80427..9713835bf27 100644 --- a/arch/arm/mach-imx/mx7/ddr.c +++ b/arch/arm/mach-imx/mx7/ddr.c @@ -196,5 +196,9 @@ unsigned int imx_ddr_size(void) if (field_val <= 29) bits++; + /* cap to max 2 GB */ + if (bits > 31) + bits = 31; + return 1 << bits; } -- cgit v1.2.3 From 0b6b8a3a199ee74e7da0fb8477ac33e7a65f0cb5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 4 Oct 2018 21:16:42 +0200 Subject: arm: imx: mx5: Make videoskip available on MX5 The board_video_skip() implementation in imx-common/video.c works on i.MX5x as well, so loosen the SoC filter in Makefile to make it available. Signed-off-by: Marek Vasut Cc: Stefano Babic --- arch/arm/mach-imx/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 733c3086708..9b00074483d 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -31,10 +31,12 @@ obj-y += cpu.o obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o obj-$(CONFIG_ENV_IS_IN_MMC) += mmc_env.o endif +ifeq ($(SOC),$(filter $(SOC),mx5 mx6 mx7)) +obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o +endif ifeq ($(SOC),$(filter $(SOC),mx6 mx7)) obj-y += cache.o init.o obj-$(CONFIG_FEC_MXC) += mac.o -obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o obj-$(CONFIG_IMX_RDC) += rdc-sema.o ifneq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o -- cgit v1.2.3 From ed85f771902b624891062d3c0fbd6fbf2f4d0982 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 10 Oct 2018 10:40:02 +0200 Subject: arm: mx5: Add LDB clock config code Add code to configure PLL4, from which the LDB clock are directly derived. Signed-off-by: Marek Vasut Cc: Stefano Babic --- arch/arm/mach-imx/mx5/clock.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mx5/clock.c b/arch/arm/mach-imx/mx5/clock.c index 427cb124158..2fabdd2eae8 100644 --- a/arch/arm/mach-imx/mx5/clock.c +++ b/arch/arm/mach-imx/mx5/clock.c @@ -838,6 +838,31 @@ static int config_ddr_clk(u32 emi_clk) return 0; } +#ifdef CONFIG_MX53 +static int config_ldb_clk(u32 ref, u32 freq) +{ + int ret = 0; + struct pll_param pll_param; + + memset(&pll_param, 0, sizeof(struct pll_param)); + + ret = calc_pll_params(ref, freq, &pll_param); + if (ret != 0) { + printf("Error:Can't find pll parameters: %d\n", + ret); + return ret; + } + + return config_pll_clk(PLL4_CLOCK, &pll_param); +} +#else +static int config_ldb_clk(u32 ref, u32 freq) +{ + /* Platform not supported */ + return -EINVAL; +} +#endif + /* * This function assumes the expected core clock has to be changed by * modifying the PLL. This is NOT true always but for most of the times, @@ -879,6 +904,10 @@ int mxc_set_clock(u32 ref, u32 freq, enum mxc_clock clk) if (config_nfc_clk(freq)) return -EINVAL; break; + case MXC_LDB_CLK: + if (config_ldb_clk(ref, freq)) + return -EINVAL; + break; default: printf("Warning:Unsupported or invalid clock type\n"); } -- cgit v1.2.3 From 39cb4f3c25a1cafbe867d0951d2d54b475a68990 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 4 Oct 2018 21:24:14 +0200 Subject: arm: mx5: Add M53Menlo board Add Menlosystems M53 board, based on the M53 SoM. This board has Ethernet, USB host, USB gadget, UART and LCD on it. Signed-off-by: Marek Vasut Cc: Stefano Babic --- arch/arm/mach-imx/mx5/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index 051b15dbff1..29051c40f32 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -30,6 +30,11 @@ config TARGET_KP_IMX53 select MX53 imply CMD_DM +config TARGET_M53MENLO + bool "Support m53menlo" + select MX53 + select SUPPORT_SPL + config TARGET_MX51EVK bool "Support mx51evk" select BOARD_LATE_INIT @@ -89,6 +94,7 @@ source "board/freescale/mx53smd/Kconfig" source "board/ge/mx53ppd/Kconfig" source "board/inversepath/usbarmory/Kconfig" source "board/k+p/kp_imx53/Kconfig" +source "board/menlo/m53menlo/Kconfig" source "board/technologic/ts4800/Kconfig" endif -- cgit v1.2.3 From b2b8b9be2fda11192b2c50e1edf2b9e652471bc2 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:08 +0200 Subject: imx: add Kconfig entry for i.MX8QXP Add Kconfig entry for i.MX8QXP Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic --- arch/arm/mach-imx/Makefile | 1 + arch/arm/mach-imx/imx8/Kconfig | 13 +++++++++++++ 2 files changed, 14 insertions(+) create mode 100644 arch/arm/mach-imx/imx8/Kconfig (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 9b00074483d..d6dcbe0c7c4 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -143,3 +143,4 @@ obj-$(CONFIG_MX6) += mx6/ obj-$(CONFIG_MX7) += mx7/ obj-$(CONFIG_ARCH_MX7ULP) += mx7ulp/ obj-$(CONFIG_MX8M) += mx8m/ +obj-$(CONFIG_ARCH_IMX8) += imx8/ diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig new file mode 100644 index 00000000000..28910c1509f --- /dev/null +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -0,0 +1,13 @@ +if ARCH_IMX8 + +config IMX8 + bool + +config IMX8QXP + select IMX8 + bool + +config SYS_SOC + default "imx8" + +endif -- cgit v1.2.3 From 60d33fcd1976e6a25c070c62d6f1064020d686bd Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:18 +0200 Subject: imx8: add basic cpu support Add basic cpu support, including cpu revision, cpu type, cpu core detection. Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic --- arch/arm/mach-imx/imx8/Makefile | 7 ++++ arch/arm/mach-imx/imx8/cpu.c | 93 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 100 insertions(+) create mode 100644 arch/arm/mach-imx/imx8/Makefile create mode 100644 arch/arm/mach-imx/imx8/cpu.c (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/Makefile b/arch/arm/mach-imx/imx8/Makefile new file mode 100644 index 00000000000..57876139a1b --- /dev/null +++ b/arch/arm/mach-imx/imx8/Makefile @@ -0,0 +1,7 @@ +# +# Copyright 2018 NXP +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += cpu.o diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c new file mode 100644 index 00000000000..0b841e291d2 --- /dev/null +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +u32 get_cpu_rev(void) +{ + u32 id = 0, rev = 0; + int ret; + + ret = sc_misc_get_control(-1, SC_R_SYSTEM, SC_C_ID, &id); + if (ret) + return 0; + + rev = (id >> 5) & 0xf; + id = (id & 0x1f) + MXC_SOC_IMX8; /* Dummy ID for chip */ + + return (id << 12) | rev; +} + +#ifdef CONFIG_DISPLAY_CPUINFO +const char *get_imx8_type(u32 imxtype) +{ + switch (imxtype) { + case MXC_CPU_IMX8QXP: + return "8QXP"; + default: + return "??"; + } +} + +const char *get_imx8_rev(u32 rev) +{ + switch (rev) { + case CHIP_REV_A: + return "A"; + case CHIP_REV_B: + return "B"; + default: + return "?"; + } +} + +const char *get_core_name(void) +{ + if (is_cortex_a35()) + return "A35"; + else + return "?"; +} + +int print_cpuinfo(void) +{ + struct udevice *dev; + struct clk cpu_clk; + int ret; + + ret = uclass_get_device(UCLASS_CPU, 0, &dev); + if (ret) + return 0; + + ret = clk_get_by_index(dev, 0, &cpu_clk); + if (ret) { + dev_err(dev, "failed to clk\n"); + return 0; + } + + u32 cpurev; + + cpurev = get_cpu_rev(); + + printf("CPU: Freescale i.MX%s rev%s %s at %ld MHz\n", + get_imx8_type((cpurev & 0xFF000) >> 12), + get_imx8_rev((cpurev & 0xFFF)), + get_core_name(), + clk_get_rate(&cpu_clk) / 1000000); + + return 0; +} +#endif -- cgit v1.2.3 From 8aa1505b59159cf8f52ba7441dd9e71c3caf1ded Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:19 +0200 Subject: imx8: add boot device detection Add get_boot_device to detect boot device. Add print_bootinfo to print the boot device info. Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic --- arch/arm/mach-imx/imx8/cpu.c | 85 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 0b841e291d2..90b6ea42116 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -11,8 +11,10 @@ #include #include #include +#include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -91,3 +93,86 @@ int print_cpuinfo(void) return 0; } #endif + +int print_bootinfo(void) +{ + enum boot_device bt_dev = get_boot_device(); + + puts("Boot: "); + switch (bt_dev) { + case SD1_BOOT: + puts("SD0\n"); + break; + case SD2_BOOT: + puts("SD1\n"); + break; + case SD3_BOOT: + puts("SD2\n"); + break; + case MMC1_BOOT: + puts("MMC0\n"); + break; + case MMC2_BOOT: + puts("MMC1\n"); + break; + case MMC3_BOOT: + puts("MMC2\n"); + break; + case FLEXSPI_BOOT: + puts("FLEXSPI\n"); + break; + case SATA_BOOT: + puts("SATA\n"); + break; + case NAND_BOOT: + puts("NAND\n"); + break; + case USB_BOOT: + puts("USB\n"); + break; + default: + printf("Unknown device %u\n", bt_dev); + break; + } + + return 0; +} + +enum boot_device get_boot_device(void) +{ + enum boot_device boot_dev = SD1_BOOT; + + sc_rsrc_t dev_rsrc; + + sc_misc_get_boot_dev(-1, &dev_rsrc); + + switch (dev_rsrc) { + case SC_R_SDHC_0: + boot_dev = MMC1_BOOT; + break; + case SC_R_SDHC_1: + boot_dev = SD2_BOOT; + break; + case SC_R_SDHC_2: + boot_dev = SD3_BOOT; + break; + case SC_R_NAND: + boot_dev = NAND_BOOT; + break; + case SC_R_FSPI_0: + boot_dev = FLEXSPI_BOOT; + break; + case SC_R_SATA_0: + boot_dev = SATA_BOOT; + break; + case SC_R_USB_0: + case SC_R_USB_1: + case SC_R_USB_2: + boot_dev = USB_BOOT; + break; + default: + break; + } + + return boot_dev; +} -- cgit v1.2.3 From c1aae21d89108adcfc4316a5a073e3ff1f972a2c Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:20 +0200 Subject: imx8: implement mmc_get_env_dev Implement mmc_get_env_dev for i.MX8. Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic --- arch/arm/mach-imx/imx8/cpu.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 90b6ea42116..0cacaa895c4 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -176,3 +176,35 @@ enum boot_device get_boot_device(void) return boot_dev; } + +#ifdef CONFIG_ENV_IS_IN_MMC +__weak int board_mmc_get_env_dev(int devno) +{ + return CONFIG_SYS_MMC_ENV_DEV; +} + +int mmc_get_env_dev(void) +{ + sc_rsrc_t dev_rsrc; + int devno; + + sc_misc_get_boot_dev(-1, &dev_rsrc); + + switch (dev_rsrc) { + case SC_R_SDHC_0: + devno = 0; + break; + case SC_R_SDHC_1: + devno = 1; + break; + case SC_R_SDHC_2: + devno = 2; + break; + default: + /* If not boot from sd/mmc, use default value */ + return CONFIG_SYS_MMC_ENV_DEV; + } + + return board_mmc_get_env_dev(devno); +} +#endif -- cgit v1.2.3 From 930b59529176bb05ea61ef9a40bf6384227f991e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:21 +0200 Subject: imx8: add mmu and dram related functions Add mmu memmap, some memory regions are reserved by M4, Arm Trusted Firmware, so need to get memreg using SCFW API and setup the memmap. Add dram_init, dram_init_banksize, get_effective_memsize functions, according to the memreg. Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic --- arch/arm/mach-imx/imx8/cpu.c | 284 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 284 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 0cacaa895c4..f73ce2fde3f 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -14,6 +14,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -208,3 +209,286 @@ int mmc_get_env_dev(void) return board_mmc_get_env_dev(devno); } #endif + +#define MEMSTART_ALIGNMENT SZ_2M /* Align the memory start with 2MB */ + +static int get_owned_memreg(sc_rm_mr_t mr, sc_faddr_t *addr_start, + sc_faddr_t *addr_end) +{ + sc_faddr_t start, end; + int ret; + bool owned; + + owned = sc_rm_is_memreg_owned(-1, mr); + if (owned) { + ret = sc_rm_get_memreg_info(-1, mr, &start, &end); + if (ret) { + printf("Memreg get info failed, %d\n", ret); + return -EINVAL; + } + debug("0x%llx -- 0x%llx\n", start, end); + *addr_start = start; + *addr_end = end; + + return 0; + } + + return -EINVAL; +} + +phys_size_t get_effective_memsize(void) +{ + sc_rm_mr_t mr; + sc_faddr_t start, end, end1; + int err; + + end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; + + for (mr = 0; mr < 64; mr++) { + err = get_owned_memreg(mr, &start, &end); + if (!err) { + start = roundup(start, MEMSTART_ALIGNMENT); + /* Too small memory region, not use it */ + if (start > end) + continue; + + /* Find the memory region runs the u-boot */ + if (start >= PHYS_SDRAM_1 && start <= end1 && + (start <= CONFIG_SYS_TEXT_BASE && + end >= CONFIG_SYS_TEXT_BASE)) { + if ((end + 1) <= ((sc_faddr_t)PHYS_SDRAM_1 + + PHYS_SDRAM_1_SIZE)) + return (end - PHYS_SDRAM_1 + 1); + else + return PHYS_SDRAM_1_SIZE; + } + } + } + + return PHYS_SDRAM_1_SIZE; +} + +int dram_init(void) +{ + sc_rm_mr_t mr; + sc_faddr_t start, end, end1, end2; + int err; + + end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; + end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; + for (mr = 0; mr < 64; mr++) { + err = get_owned_memreg(mr, &start, &end); + if (!err) { + start = roundup(start, MEMSTART_ALIGNMENT); + /* Too small memory region, not use it */ + if (start > end) + continue; + + if (start >= PHYS_SDRAM_1 && start <= end1) { + if ((end + 1) <= end1) + gd->ram_size += end - start + 1; + else + gd->ram_size += end1 - start; + } else if (start >= PHYS_SDRAM_2 && start <= end2) { + if ((end + 1) <= end2) + gd->ram_size += end - start + 1; + else + gd->ram_size += end2 - start; + } + } + } + + /* If error, set to the default value */ + if (!gd->ram_size) { + gd->ram_size = PHYS_SDRAM_1_SIZE; + gd->ram_size += PHYS_SDRAM_2_SIZE; + } + return 0; +} + +static void dram_bank_sort(int current_bank) +{ + phys_addr_t start; + phys_size_t size; + + while (current_bank > 0) { + if (gd->bd->bi_dram[current_bank - 1].start > + gd->bd->bi_dram[current_bank].start) { + start = gd->bd->bi_dram[current_bank - 1].start; + size = gd->bd->bi_dram[current_bank - 1].size; + + gd->bd->bi_dram[current_bank - 1].start = + gd->bd->bi_dram[current_bank].start; + gd->bd->bi_dram[current_bank - 1].size = + gd->bd->bi_dram[current_bank].size; + + gd->bd->bi_dram[current_bank].start = start; + gd->bd->bi_dram[current_bank].size = size; + } + current_bank--; + } +} + +int dram_init_banksize(void) +{ + sc_rm_mr_t mr; + sc_faddr_t start, end, end1, end2; + int i = 0; + int err; + + end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; + end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; + + for (mr = 0; mr < 64 && i < CONFIG_NR_DRAM_BANKS; mr++) { + err = get_owned_memreg(mr, &start, &end); + if (!err) { + start = roundup(start, MEMSTART_ALIGNMENT); + if (start > end) /* Small memory region, no use it */ + continue; + + if (start >= PHYS_SDRAM_1 && start <= end1) { + gd->bd->bi_dram[i].start = start; + + if ((end + 1) <= end1) + gd->bd->bi_dram[i].size = + end - start + 1; + else + gd->bd->bi_dram[i].size = end1 - start; + + dram_bank_sort(i); + i++; + } else if (start >= PHYS_SDRAM_2 && start <= end2) { + gd->bd->bi_dram[i].start = start; + + if ((end + 1) <= end2) + gd->bd->bi_dram[i].size = + end - start + 1; + else + gd->bd->bi_dram[i].size = end2 - start; + + dram_bank_sort(i); + i++; + } + } + } + + /* If error, set to the default value */ + if (!i) { + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + gd->bd->bi_dram[1].start = PHYS_SDRAM_2; + gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; + } + + return 0; +} + +static u64 get_block_attrs(sc_faddr_t addr_start) +{ + u64 attr = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN; + + if ((addr_start >= PHYS_SDRAM_1 && + addr_start <= ((sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) || + (addr_start >= PHYS_SDRAM_2 && + addr_start <= ((sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE))) + return (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE); + + return attr; +} + +static u64 get_block_size(sc_faddr_t addr_start, sc_faddr_t addr_end) +{ + sc_faddr_t end1, end2; + + end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE; + end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE; + + if (addr_start >= PHYS_SDRAM_1 && addr_start <= end1) { + if ((addr_end + 1) > end1) + return end1 - addr_start; + } else if (addr_start >= PHYS_SDRAM_2 && addr_start <= end2) { + if ((addr_end + 1) > end2) + return end2 - addr_start; + } + + return (addr_end - addr_start + 1); +} + +#define MAX_PTE_ENTRIES 512 +#define MAX_MEM_MAP_REGIONS 16 + +static struct mm_region imx8_mem_map[MAX_MEM_MAP_REGIONS]; +struct mm_region *mem_map = imx8_mem_map; + +void enable_caches(void) +{ + sc_rm_mr_t mr; + sc_faddr_t start, end; + int err, i; + + /* Create map for registers access from 0x1c000000 to 0x80000000*/ + imx8_mem_map[0].virt = 0x1c000000UL; + imx8_mem_map[0].phys = 0x1c000000UL; + imx8_mem_map[0].size = 0x64000000UL; + imx8_mem_map[0].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN; + + i = 1; + for (mr = 0; mr < 64 && i < MAX_MEM_MAP_REGIONS; mr++) { + err = get_owned_memreg(mr, &start, &end); + if (!err) { + imx8_mem_map[i].virt = start; + imx8_mem_map[i].phys = start; + imx8_mem_map[i].size = get_block_size(start, end); + imx8_mem_map[i].attrs = get_block_attrs(start); + i++; + } + } + + if (i < MAX_MEM_MAP_REGIONS) { + imx8_mem_map[i].size = 0; + imx8_mem_map[i].attrs = 0; + } else { + puts("Error, need more MEM MAP REGIONS reserved\n"); + icache_enable(); + return; + } + + for (i = 0; i < MAX_MEM_MAP_REGIONS; i++) { + debug("[%d] vir = 0x%llx phys = 0x%llx size = 0x%llx attrs = 0x%llx\n", + i, imx8_mem_map[i].virt, imx8_mem_map[i].phys, + imx8_mem_map[i].size, imx8_mem_map[i].attrs); + } + + icache_enable(); + dcache_enable(); +} + +#ifndef CONFIG_SYS_DCACHE_OFF +u64 get_page_table_size(void) +{ + u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64); + u64 size = 0; + + /* + * For each memory region, the max table size: + * 2 level 3 tables + 2 level 2 tables + 1 level 1 table + */ + size = (2 + 2 + 1) * one_pt * MAX_MEM_MAP_REGIONS + one_pt; + + /* + * We need to duplicate our page table once to have an emergency pt to + * resort to when splitting page tables later on + */ + size *= 2; + + /* + * We may need to split page tables later on if dcache settings change, + * so reserve up to 4 (random pick) page tables for that. + */ + size += one_pt * 4; + + return size; +} +#endif -- cgit v1.2.3 From 1ef20a3d812281b5979ec0cb030b91124987e0b6 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:22 +0200 Subject: imx8: add arch_cpu_init arch_cpu_init_dm Add arch_cpu_init(_dm) mainly to open the channel between ACore and SCU. Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic --- arch/arm/mach-imx/imx8/cpu.c | 53 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index f73ce2fde3f..d80b4b175dd 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -95,6 +95,57 @@ int print_cpuinfo(void) } #endif +#define BT_PASSOVER_TAG 0x504F +struct pass_over_info_t *get_pass_over_info(void) +{ + struct pass_over_info_t *p = + (struct pass_over_info_t *)PASS_OVER_INFO_ADDR; + + if (p->barker != BT_PASSOVER_TAG || + p->len != sizeof(struct pass_over_info_t)) + return NULL; + + return p; +} + +int arch_cpu_init(void) +{ + struct pass_over_info_t *pass_over = get_pass_over_info(); + + if (pass_over && pass_over->g_ap_mu == 0) { + /* + * When ap_mu is 0, means the U-Boot booted + * from first container + */ + sc_misc_boot_status(-1, SC_MISC_BOOT_STATUS_SUCCESS); + } + + return 0; +} + +int arch_cpu_init_dm(void) +{ + struct udevice *devp; + int node, ret; + + node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "fsl,imx8-mu"); + ret = device_bind_driver_to_node(gd->dm_root, "imx8_scu", "imx8_scu", + offset_to_ofnode(node), &devp); + + if (ret) { + printf("could not find scu %d\n", ret); + return ret; + } + + ret = device_probe(devp); + if (ret) { + printf("scu probe failed %d\n", ret); + return ret; + } + + return 0; +} + int print_bootinfo(void) { enum boot_device bt_dev = get_boot_device(); @@ -252,7 +303,7 @@ phys_size_t get_effective_memsize(void) if (start > end) continue; - /* Find the memory region runs the u-boot */ + /* Find the memory region runs the U-Boot */ if (start >= PHYS_SDRAM_1 && start <= end1 && (start <= CONFIG_SYS_TEXT_BASE && end >= CONFIG_SYS_TEXT_BASE)) { -- cgit v1.2.3 From 70b4b49b91e2bfb148307dc4e35594740ba00514 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Thu, 18 Oct 2018 14:28:23 +0200 Subject: imx8: cpu: add function for reading FEC MAC from fuse FEC driver requires imx_get_mac_from_fuse(). Add it in preparation for ENETx support. Signed-off-by: Anatolij Gustschin Cc: Stefano Babic Reviewed-by: Peng Fan --- arch/arm/mach-imx/imx8/cpu.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index d80b4b175dd..da34a94a23d 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -543,3 +543,41 @@ u64 get_page_table_size(void) return size; } #endif + +#define FUSE_MAC0_WORD0 708 +#define FUSE_MAC0_WORD1 709 +#define FUSE_MAC1_WORD0 710 +#define FUSE_MAC1_WORD1 711 + +void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) +{ + u32 word[2], val[2] = {}; + int i, ret; + + if (dev_id == 0) { + word[0] = FUSE_MAC0_WORD0; + word[1] = FUSE_MAC0_WORD1; + } else { + word[0] = FUSE_MAC1_WORD0; + word[1] = FUSE_MAC1_WORD1; + } + + for (i = 0; i < 2; i++) { + ret = sc_misc_otp_fuse_read(-1, word[i], &val[i]); + if (ret < 0) + goto err; + } + + mac[0] = val[0]; + mac[1] = val[0] >> 8; + mac[2] = val[0] >> 16; + mac[3] = val[0] >> 24; + mac[4] = val[1]; + mac[5] = val[1] >> 8; + + debug("%s: MAC%d: %02x.%02x.%02x.%02x.%02x.%02x\n", + __func__, dev_id, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + return; +err: + printf("%s: fuse %d, err: %d\n", __func__, word[i], ret); +} -- cgit v1.2.3 From 2fdb1a1df925f885afc677e61755125844a9b7ef Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Thu, 18 Oct 2018 14:28:24 +0200 Subject: imx8: cpu: add uclass based CPU driver print_cpuinfo() in board init code requires uclass CPU driver, add it to be able to display CPU info when CONFIG_DISPLAY_CPUINFO option is enabled. CPU node in DT will have to include 'clocks' and 'u-boot,dm-pre-reloc' properties for generic print_cpuinfo() to work as expected. The driver outputs info for i.MX8QXP Rev A and Rev B CPUs. Signed-off-by: Anatolij Gustschin Cc: Stefano Babic Reviewed-by: Peng Fan --- arch/arm/mach-imx/imx8/cpu.c | 215 ++++++++++++++++++++++++++++--------------- 1 file changed, 139 insertions(+), 76 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index da34a94a23d..f093f34ca59 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -19,82 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; -u32 get_cpu_rev(void) -{ - u32 id = 0, rev = 0; - int ret; - - ret = sc_misc_get_control(-1, SC_R_SYSTEM, SC_C_ID, &id); - if (ret) - return 0; - - rev = (id >> 5) & 0xf; - id = (id & 0x1f) + MXC_SOC_IMX8; /* Dummy ID for chip */ - - return (id << 12) | rev; -} - -#ifdef CONFIG_DISPLAY_CPUINFO -const char *get_imx8_type(u32 imxtype) -{ - switch (imxtype) { - case MXC_CPU_IMX8QXP: - return "8QXP"; - default: - return "??"; - } -} - -const char *get_imx8_rev(u32 rev) -{ - switch (rev) { - case CHIP_REV_A: - return "A"; - case CHIP_REV_B: - return "B"; - default: - return "?"; - } -} - -const char *get_core_name(void) -{ - if (is_cortex_a35()) - return "A35"; - else - return "?"; -} - -int print_cpuinfo(void) -{ - struct udevice *dev; - struct clk cpu_clk; - int ret; - - ret = uclass_get_device(UCLASS_CPU, 0, &dev); - if (ret) - return 0; - - ret = clk_get_by_index(dev, 0, &cpu_clk); - if (ret) { - dev_err(dev, "failed to clk\n"); - return 0; - } - - u32 cpurev; - - cpurev = get_cpu_rev(); - - printf("CPU: Freescale i.MX%s rev%s %s at %ld MHz\n", - get_imx8_type((cpurev & 0xFF000) >> 12), - get_imx8_rev((cpurev & 0xFFF)), - get_core_name(), - clk_get_rate(&cpu_clk) / 1000000); - - return 0; -} -#endif - #define BT_PASSOVER_TAG 0x504F struct pass_over_info_t *get_pass_over_info(void) { @@ -581,3 +506,141 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) err: printf("%s: fuse %d, err: %d\n", __func__, word[i], ret); } + +#if CONFIG_IS_ENABLED(CPU) +struct cpu_imx_platdata { + const char *name; + const char *rev; + const char *type; + u32 cpurev; + u32 freq_mhz; +}; + +u32 get_cpu_rev(void) +{ + u32 id = 0, rev = 0; + int ret; + + ret = sc_misc_get_control(-1, SC_R_SYSTEM, SC_C_ID, &id); + if (ret) + return 0; + + rev = (id >> 5) & 0xf; + id = (id & 0x1f) + MXC_SOC_IMX8; /* Dummy ID for chip */ + + return (id << 12) | rev; +} + +const char *get_imx8_type(u32 imxtype) +{ + switch (imxtype) { + case MXC_CPU_IMX8QXP: + case MXC_CPU_IMX8QXP_A0: + return "QXP"; + default: + return "??"; + } +} + +const char *get_imx8_rev(u32 rev) +{ + switch (rev) { + case CHIP_REV_A: + return "A"; + case CHIP_REV_B: + return "B"; + default: + return "?"; + } +} + +const char *get_core_name(void) +{ + if (is_cortex_a35()) + return "A35"; + else if (is_cortex_a53()) + return "A53"; + else if (is_cortex_a72()) + return "A72"; + else + return "?"; +} + +int cpu_imx_get_desc(struct udevice *dev, char *buf, int size) +{ + struct cpu_imx_platdata *plat = dev_get_platdata(dev); + + if (size < 100) + return -ENOSPC; + + snprintf(buf, size, "CPU: Freescale i.MX8%s Rev%s %s at %u MHz\n", + plat->type, plat->rev, plat->name, plat->freq_mhz); + + return 0; +} + +static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info) +{ + struct cpu_imx_platdata *plat = dev_get_platdata(dev); + + info->cpu_freq = plat->freq_mhz * 1000; + info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU); + return 0; +} + +static int cpu_imx_get_count(struct udevice *dev) +{ + return 4; +} + +static int cpu_imx_get_vendor(struct udevice *dev, char *buf, int size) +{ + snprintf(buf, size, "NXP"); + return 0; +} + +static const struct cpu_ops cpu_imx8_ops = { + .get_desc = cpu_imx_get_desc, + .get_info = cpu_imx_get_info, + .get_count = cpu_imx_get_count, + .get_vendor = cpu_imx_get_vendor, +}; + +static const struct udevice_id cpu_imx8_ids[] = { + { .compatible = "arm,cortex-a35" }, + { } +}; + +static int imx8_cpu_probe(struct udevice *dev) +{ + struct cpu_imx_platdata *plat = dev_get_platdata(dev); + struct clk cpu_clk; + u32 cpurev; + int ret; + + cpurev = get_cpu_rev(); + plat->cpurev = cpurev; + plat->name = get_core_name(); + plat->rev = get_imx8_rev(cpurev & 0xFFF); + plat->type = get_imx8_type((cpurev & 0xFF000) >> 12); + + ret = clk_get_by_index(dev, 0, &cpu_clk); + if (ret) { + debug("%s: Failed to get CPU clk: %d\n", __func__, ret); + return 0; + } + + plat->freq_mhz = clk_get_rate(&cpu_clk) / 1000000; + return 0; +} + +U_BOOT_DRIVER(cpu_imx8_drv) = { + .name = "imx8x_cpu", + .id = UCLASS_CPU, + .of_match = cpu_imx8_ids, + .ops = &cpu_imx8_ops, + .probe = imx8_cpu_probe, + .platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata), + .flags = DM_FLAG_PRE_RELOC, +}; +#endif -- cgit v1.2.3 From abeebc19dbe0445793dab45d48dc60541e58fe6a Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:25 +0200 Subject: imx8: add iomux configuration api Add iomux configuration api. Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic --- arch/arm/mach-imx/imx8/Makefile | 2 +- arch/arm/mach-imx/imx8/iomux.c | 43 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-imx/imx8/iomux.c (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/Makefile b/arch/arm/mach-imx/imx8/Makefile index 57876139a1b..31ad169ccf3 100644 --- a/arch/arm/mach-imx/imx8/Makefile +++ b/arch/arm/mach-imx/imx8/Makefile @@ -4,4 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += cpu.o +obj-y += cpu.o iomux.o diff --git a/arch/arm/mach-imx/imx8/iomux.c b/arch/arm/mach-imx/imx8/iomux.c new file mode 100644 index 00000000000..0ade85fb8fb --- /dev/null +++ b/arch/arm/mach-imx/imx8/iomux.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* + * configures a single pad in the iomuxer + */ +void imx8_iomux_setup_pad(iomux_cfg_t pad) +{ + sc_pad_t pin_id = pad & PIN_ID_MASK; + int ret; + + u32 val = (u32)((pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT); + + val |= PADRING_IFMUX_EN_MASK; + val |= PADRING_GP_EN_MASK; + + ret = sc_pad_set(-1, pin_id, val); + if (ret) + printf("sc_pad_set failed!, pin: %u, val: 0x%x\n", pin_id, val); + + debug("iomux: pin %d, val = 0x%x\n", pin_id, val); +} + +/* configures a list of pads within declared with IOMUX_PADS macro */ +void imx8_iomux_setup_multiple_pads(iomux_cfg_t const *pad_list, u32 count) +{ + iomux_cfg_t const *p = pad_list; + int i; + + for (i = 0; i < count; i++) { + imx8_iomux_setup_pad(*p); + p++; + } +} -- cgit v1.2.3 From 2d58296f3ec93b9d9ff862eb6e656af1f7cd8c47 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:26 +0200 Subject: imx8: add dummy clock This driver is mostly used to avoid build errors. We use uclass clk driver for clk related operations. Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic --- arch/arm/mach-imx/imx8/clock.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 arch/arm/mach-imx/imx8/clock.c (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/clock.c b/arch/arm/mach-imx/imx8/clock.c new file mode 100644 index 00000000000..d747e1332f0 --- /dev/null +++ b/arch/arm/mach-imx/imx8/clock.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +u32 mxc_get_clock(enum mxc_clock clk) +{ + switch (clk) { + default: + printf("Unsupported mxc_clock %d\n", clk); + break; + } + + return 0; +} -- cgit v1.2.3 From d0dd73974c613650cb0c3d32a734a954cedc9f8a Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 18 Oct 2018 14:28:37 +0200 Subject: imx: add i.MX8QXP MEK board support Add i.MX8QXP MEK board support Enabled pinctrl/clk/power-domain/mmc/i2c/fec driver. Added README file. Signed-off-by: Peng Fan Reviewed-by: Anatolij Gustschin Cc: Stefano Babic Cc: Fabio Estevam --- arch/arm/mach-imx/imx8/Kconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 28910c1509f..0d3a87cd744 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -10,4 +10,17 @@ config IMX8QXP config SYS_SOC default "imx8" +choice + prompt "i.MX8 board select" + optional + +config TARGET_IMX8QXP_MEK + bool "Support i.MX8QXP MEK board" + select BOARD_LATE_INIT + select IMX8QXP + +endchoice + +source "board/freescale/imx8qxp_mek/Kconfig" + endif -- cgit v1.2.3 From 0e5c8ce7342db9c88d59412b184c5e214c88f27c Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 16 Oct 2018 04:50:35 +0000 Subject: arm: imx: include imx8image support When building i.MX8/8X board, use imx8image type. `-e $(CONFIG_SYS_TEXT_BASE)` is not needed, but no harm to keep it for i.MX8/8X Signed-off-by: Peng Fan --- arch/arm/mach-imx/Makefile | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index d6dcbe0c7c4..2d79c71371f 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -86,24 +86,29 @@ IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%) $(Q)mkdir -p $(dir $@) $(call if_changed_dep,cpp_cfg) -MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T imximage \ - -e $(CONFIG_SYS_TEXT_BASE) +IMAGE_TYPE = imximage +ifeq ($(CONFIG_ARCH_IMX8), y) +IMAGE_TYPE = imx8image +endif + +MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \ + -T $(IMAGE_TYPE) -e $(CONFIG_SYS_TEXT_BASE) u-boot.imx: MKIMAGEOUTPUT = u-boot.imx.log u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE $(call if_changed,mkimage) ifeq ($(CONFIG_OF_SEPARATE),y) -MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T imximage \ - -e $(CONFIG_SYS_TEXT_BASE) +MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \ + -T $(IMAGE_TYPE) -e $(CONFIG_SYS_TEXT_BASE) u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log u-boot-dtb.imx: u-boot-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE $(call if_changed,mkimage) endif -MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) -T imximage \ - -e $(CONFIG_SPL_TEXT_BASE) +MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \ + -T $(IMAGE_TYPE) -e $(CONFIG_SPL_TEXT_BASE) SPL: MKIMAGEOUTPUT = SPL.log SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout $(PLUGIN).bin FORCE -- cgit v1.2.3 From be277c3a89fcec9f837bf4fb562c606155b0999f Mon Sep 17 00:00:00 2001 From: Rui Miguel Silva Date: Wed, 5 Sep 2018 11:56:05 +0100 Subject: imx: mx7: avoid some initialization if low level is skipped We can have the case where u-boot is launched after some other low level enabler, like for example when u-boot runs after arm-trusted-firmware and/or optee. So, because of that we may need to jump the initialization of some IP blocks even because we may no longer have the permission for that. So, if the config option to skip low level init is set disable also timer, board and csu initialization. Signed-off-by: Rui Miguel Silva Signed-off-by: Bryan O'Donoghue Cc: Stefano Babic Cc: Fabio Estevam Cc: Albert Aribaud Cc: Peng Fan Cc: u-boot@lists.denx.de Reviewed-by: Peng Fan --- arch/arm/mach-imx/mx7/soc.c | 2 ++ arch/arm/mach-imx/syscounter.c | 2 ++ 2 files changed, 4 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 502f0331629..3f74f8a3ede 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -164,6 +164,7 @@ u32 __weak get_board_rev(void) } #endif +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /* enable all periherial can be accessed in nosec mode */ static void init_csu(void) { @@ -285,6 +286,7 @@ int arch_cpu_init(void) return 0; } +#endif #ifdef CONFIG_ARCH_MISC_INIT int arch_misc_init(void) diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index 676bb3caa93..2c319681fc8 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -55,6 +55,7 @@ static inline unsigned long long us_to_tick(unsigned long long usec) return usec; } +#ifndef CONFIG_SKIP_LOWLEVEL_INIT int timer_init(void) { struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR; @@ -76,6 +77,7 @@ int timer_init(void) return 0; } +#endif unsigned long long get_ticks(void) { -- cgit v1.2.3 From d79611598fb74dc0f7cb37d855fff28d77ba8d53 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 25 Oct 2018 08:32:40 +0000 Subject: imx: mkimage: avoid stop CI when required files not exists Introduce a new script to check whether file exists and use that check in Makefile to avoid break CI system. The script return 1 when the required files not exists, return 0 when files exists. The script will ignore check to u-boot-dtb.bin, because if there is something wrong to generate u-boot-dtb.bin, there must be some code error. Signed-off-by: Peng Fan --- arch/arm/mach-imx/Makefile | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 2d79c71371f..72fe23a2b95 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -86,9 +86,13 @@ IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%) $(Q)mkdir -p $(dir $@) $(call if_changed_dep,cpp_cfg) -IMAGE_TYPE = imximage ifeq ($(CONFIG_ARCH_IMX8), y) -IMAGE_TYPE = imx8image +CNTR_DEPFILES := $(srctree)/tools/imx_cntr_image.sh +IMAGE_TYPE := imx8image +DEPFILE_EXISTS := $(shell if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES) u-boot-dtb.cfgout; echo $$?; fi) +else +IMAGE_TYPE := imximage +DEPFILE_EXISTS := 0 endif MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \ @@ -104,8 +108,10 @@ MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \ u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log u-boot-dtb.imx: u-boot-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE +ifeq ($(DEPFILE_EXISTS),0) $(call if_changed,mkimage) endif +endif MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \ -T $(IMAGE_TYPE) -e $(CONFIG_SPL_TEXT_BASE) -- cgit v1.2.3