From 13f56163c945c3838f84cb449180595d8581d2ee Mon Sep 17 00:00:00 2001 From: Puneet Saxena Date: Thu, 31 May 2012 11:48:46 +0530 Subject: arm: tegra3: Fix bootup up issue At bootup time device enters in standby state as CLK_RST_CONTROLLER_SCLK_BURST_POLICY is not set correctly. This change correctly sets clock burst policy. BUG = None TEST= Build OK for Seaboard,Cardhu and Waluigi. Tested on Cardhu and waluigi. Device boots up. Change-Id: I598ca7bcfc4a39ecaa68c211d3439ac3569c6e44 Signed-off-by: Puneet Saxena Reviewed-on: https://gerrit.chromium.org/gerrit/24164 Reviewed-by: Varun Wadekar Reviewed-by: Tom Warren Reviewed-by: Jimmy Zhang Tested-by: Tom Warren Commit-Ready: Tom Warren Reviewed-by: Simon Glass --- arch/arm/include/asm/arch-tegra/clk_rst.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/include/asm/arch-tegra/clk_rst.h') diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h b/arch/arm/include/asm/arch-tegra/clk_rst.h index 6bf9cb6131..d170b3c723 100644 --- a/arch/arm/include/asm/arch-tegra/clk_rst.h +++ b/arch/arm/include/asm/arch-tegra/clk_rst.h @@ -275,7 +275,6 @@ enum { #define SUPER_CDIV_ENB (1 << 31) /* CRC_SCLK_BURST_POLICY_0 28h */ -#define SCLK_SYS_STATE_RUN (2 << 28) #define SCLK_SWAKE_FIQ_SRC_CLKM (0 << 12) #define SCLK_SWAKE_IRQ_SRC_CLKM (0 << 8) #define SCLK_SWAKE_RUN_SRC_CLKM (0 << 4) -- cgit v1.2.3