From 43e2d1dd47a7e9b126659dc17a10f351e49bc53b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 22 Aug 2020 22:45:36 +0200 Subject: ARM: dts: stm32: Pull UART4 RX high on AV96 There is no dedicated pull resistor on the AV96 UART4 (console UART) pin. In case there is no UART adapter installed on the AV96, the line is floating and can trigger reception of garbage characters, which in turn can abort U-Boot autoboot. Add default pull up to mitigate this problem. Signed-off-by: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi index cb92fc9c14..1ae57e1854 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi @@ -75,6 +75,8 @@ }; pins2 { u-boot,dm-pre-reloc; + /delete-property/ bias-disable; + bias-pull-up; }; }; -- cgit v1.2.3 From b6055945d66d0f4e3b1ecb82af476232067a4ee4 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 22 Aug 2020 22:45:25 +0200 Subject: ARM: dts: stm32: Adjust PLL4 settings on AV96 again PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the 50 MHz generated from PLL4Q cannot be divided well enough to produce accurate clock for HDMI pixel clock. Adjust it to generate 74.25 MHz instead. The PLL4P/PLL4R are generating 99 MHz instead of 100 MHz, which is in tolerance for the SDMMC. Signed-off-by: Marek Vasut Cc: Gerald Baeza Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index 7529068c51..c73318488d 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -132,11 +132,11 @@ u-boot,dm-pre-reloc; }; - /* VCO = 600.0 MHz => P = 100, Q = 50, R = 100 */ + /* VCO = 600.0 MHz => P = 99, Q = 74, R = 99 */ pll4: st,pll@3 { compatible = "st,stm32mp1-pll"; reg = <3>; - cfg = < 1 49 5 11 5 PQR(1,1,1) >; + cfg = < 3 98 5 7 5 PQR(1,1,1) >; u-boot,dm-pre-reloc; }; }; -- cgit v1.2.3 From fe4931c09ac77c775786c12148e8fd47ce4bb833 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 13 Apr 2020 09:38:31 +0800 Subject: rockchip: rv1108: Enable grf as pre-reloc node The grf node will be used before relocate, enable it in dts. Signed-off-by: Kever Yang --- arch/arm/dts/rv1108-u-boot.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi index 41ac054b81..6a2098b8d4 100644 --- a/arch/arm/dts/rv1108-u-boot.dtsi +++ b/arch/arm/dts/rv1108-u-boot.dtsi @@ -4,3 +4,7 @@ */ #include "rockchip-u-boot.dtsi" + +&grf { + u-boot,dm-pre-reloc; +}; -- cgit v1.2.3 From 08b6a60ee8aaf0856aef86173e5b8b617f35a24a Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Fri, 28 Aug 2020 21:08:05 +0300 Subject: colibri-imx8qxp: rename all occurences to colibri-imx8x The Toradex product is called colibri-imx8x consisting of SoM with i.MX8QXP and i.MX8DX SoCs. Signed-off-by: Philippe Schenker Reviewed-by: Igor Opaniuk --- arch/arm/dts/fsl-imx8qxp-colibri.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts index 0c20edf2cf..11ece34c02 100644 --- a/arch/arm/dts/fsl-imx8qxp-colibri.dts +++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts @@ -9,8 +9,8 @@ #include "fsl-imx8qxp-colibri-u-boot.dtsi" / { - model = "Toradex Colibri iMX8QXP"; - compatible = "toradex,colibri-imx8qxp", "fsl,imx8qxp"; + model = "Toradex Colibri iMX8X"; + compatible = "toradex,colibri-imx8x", "fsl,imx8qxp"; chosen { bootargs = "console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200"; @@ -32,7 +32,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>; - colibri-imx8qxp { + colibri-imx8x { pinctrl_lpuart0: lpuart0grp { fsl,pins = < SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 -- cgit v1.2.3 From bf46474e21ed353574610ea6db0375ff69965a0f Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Fri, 28 Aug 2020 21:08:06 +0300 Subject: apalis-imx8qm: rename all occurences to apalis-imx8 The Toradex product is called apalis-imx8 consisting of SoM with i.MX8QM and i.MX8QP SoCs. Signed-off-by: Philippe Schenker Reviewed-by: Igor Opaniuk --- arch/arm/dts/fsl-imx8qm-apalis.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/fsl-imx8qm-apalis.dts b/arch/arm/dts/fsl-imx8qm-apalis.dts index 9b1f8aa32d..5187b79452 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis.dts +++ b/arch/arm/dts/fsl-imx8qm-apalis.dts @@ -12,8 +12,8 @@ #include "fsl-imx8qm-apalis-u-boot.dtsi" / { - model = "Toradex Apalis iMX8QM"; - compatible = "toradex,apalis-imx8qm", "fsl,imx8qm"; + model = "Toradex Apalis iMX8"; + compatible = "toradex,apalis-imx8", "fsl,imx8qm"; chosen { bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200"; @@ -38,7 +38,7 @@ <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>; - apalis-imx8qm { + apalis-imx8 { pinctrl_gpio12: gpio12grp { fsl,pins = < /* Apalis GPIO1 */ -- cgit v1.2.3