From 449372148f6d9b5b8bded88ed8eee5c581a4bf81 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Mon, 9 Nov 2015 16:42:07 +0530 Subject: armv8: LS2080A: Rename LS2085A to reflect LS2080A MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava Signed-off-by: Prabhakar Kushwaha [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun --- arch/arm/dts/fsl-ls2080a-rdb.dts | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 arch/arm/dts/fsl-ls2080a-rdb.dts (limited to 'arch/arm/dts/fsl-ls2080a-rdb.dts') diff --git a/arch/arm/dts/fsl-ls2080a-rdb.dts b/arch/arm/dts/fsl-ls2080a-rdb.dts new file mode 100644 index 00000000000..1a1813bdbf1 --- /dev/null +++ b/arch/arm/dts/fsl-ls2080a-rdb.dts @@ -0,0 +1,35 @@ +/* + * Freescale ls2080a RDB board device tree source + * + * Copyright 2013-2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include "fsl-ls2080a.dtsi" + +/ { + model = "Freescale Layerscape 2080a RDB Board"; + compatible = "fsl,ls2080a-rdb", "fsl,ls2080a"; + + aliases { + spi1 = &dspi; + }; +}; + +&dspi { + bus-num = <0>; + status = "okay"; + + dflash0: n25q512a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; +}; -- cgit v1.2.3