From c1c597e8a8abfe16938ce8a1d792c703c1a6c79b Mon Sep 17 00:00:00 2001 From: Ashish Kumar Date: Mon, 19 Feb 2018 14:16:58 +0530 Subject: armv8: ls1088aqds: Add IFC-NOR as boot source for LS1088 IFC-NOR and QSPI-NOR pins are multiplexed on SoC, so they cannot be accessed simultaneously. IFC-NOR can be accessed along with SD-BOOT. Ls1088aqds_sdcard_ifc_defconfig is default config for SD boot and IFC-NOR to be used as flash. This allows writing to IFC-NOR flash. QSPI and DSPI cannot be accessed in this defconfig. IFC-NOR image is generated using ls1088aqds_defconfig. Signed-off-by: Ashish Kumar Reviewed-by: York Sun --- arch/arm/dts/fsl-ls1088a-qds.dts | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'arch/arm/dts/fsl-ls1088a-qds.dts') diff --git a/arch/arm/dts/fsl-ls1088a-qds.dts b/arch/arm/dts/fsl-ls1088a-qds.dts index 225c7c53c7..02000fcba8 100644 --- a/arch/arm/dts/fsl-ls1088a-qds.dts +++ b/arch/arm/dts/fsl-ls1088a-qds.dts @@ -19,6 +19,43 @@ }; }; +&ifc { + #address-cells = <2>; + #size-cells = <1>; + /* NOR, NAND Flashes and FPGA on board */ + ranges = <0 0 0x5 0x80000000 0x08000000 + 2 0 0x5 0x30000000 0x00010000 + 3 0 0x5 0x20000000 0x00010000>; + status = "okay"; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x8000000>; + bank-width = <2>; + device-width = <1>; + }; + + nand@2,0 { + compatible = "fsl,ifc-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x1 0x0 0x10000>; + }; + + fpga: board-control@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus", "fsl,ls1088aqds-fpga", + "fsl,fpga-qixis"; + reg = <0x2 0x0 0x0000100>; + bank-width = <1>; + device-width = <1>; + ranges = <0 2 0 0x100>; + }; +}; + &dspi { bus-num = <0>; status = "okay"; -- cgit v1.2.3