From 3349682c777e0835a0b628ae1ec2859632d479a2 Mon Sep 17 00:00:00 2001
From: Przemyslaw Marczak <p.marczak@samsung.com>
Date: Tue, 12 Jan 2016 15:40:43 +0100
Subject: dts:exynos:update pinctrl size-cells and fix child regs

This change is required to avoid warnings about invalid
size-cells defined in device-tree pinctrl nodes for Exynos.

Tested on:
- Odroid U3
- Odroid XU3

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

(limited to 'arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi')

diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
index 8e5a6c61180..33ecc148a79 100644
--- a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
@@ -9,37 +9,37 @@
 /{
 	pinctrl_0: pinctrl@11400000 {
 		#address-cells = <1>;
-		#size-cells = <0>;
+		#size-cells = <1>;
 		gpf0: gpf0 {
-			reg = <0x180>;
+			reg = <0x180 0x20>;
 		};
 		gpj0: gpj0 {
-			reg = <0x240>;
+			reg = <0x240 0x20>;
 		};
 	};
 
 	pinctrl_1: pinctrl@11000000 {
 		#address-cells = <1>;
-		#size-cells = <0>;
+		#size-cells = <1>;
 		gpk0: gpk0 {
-			reg = <0x40>;
+			reg = <0x40 0x20>;
 		};
 		gpm0: gpm0 {
-			reg = <0x260>;
+			reg = <0x260 0x20>;
 		};
 		gpx0: gpx0 {
-			reg = <0xc00>;
+			reg = <0xc00 0x20>;
 		};
 	};
 
 	pinctrl_2: pinctrl@03860000 {
 		#address-cells = <1>;
-		#size-cells = <0>;
+		#size-cells = <1>;
 	};
 
 	pinctrl_3: pinctrl@106E0000 {
 		#address-cells = <1>;
-		#size-cells = <0>;
+		#size-cells = <1>;
 	};
 
 };
-- 
cgit v1.2.3