From 4800be4a0c0058fd1670576ec0872980f3ed78f5 Mon Sep 17 00:00:00 2001 From: Dave Gerlach Date: Tue, 18 Feb 2014 07:31:59 -0500 Subject: ARM: AM43xx: EMIF: configure self-refresh entry delay Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the desired delay in cycles that the EMIF waits without an access to enter self-refresh, in this case 8192 cycles. With this, code desiring to enter self refresh only has to toggle one bit to enable it. Signed-off-by: Dave Gerlach --- arch/arm/cpu/armv7/am33xx/ddr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/cpu/armv7/am33xx/ddr.c') diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index d05e666a742..4173a10b143 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -80,8 +80,8 @@ static void configure_mr(int nr, u32 cs) */ void config_sdram_emif4d5(const struct emif_regs *regs, int nr) { - writel(0x0, &emif_reg[nr]->emif_pwr_mgmt_ctrl); - writel(0x0, &emif_reg[nr]->emif_pwr_mgmt_ctrl_shdw); + writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl); + writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl_shdw); writel(0x1, &emif_reg[nr]->emif_iodft_tlgc); writel(regs->zq_config, &emif_reg[nr]->emif_zq_config); -- cgit v1.2.3 From f84880f0f31e2d293b987d37446dc8a2e34aa925 Mon Sep 17 00:00:00 2001 From: Dave Gerlach Date: Tue, 18 Feb 2014 07:32:00 -0500 Subject: ARM: AM43xx: Write sdram_config to secure_emif_sdram_config The register secure_emif_sdram_config in control module is copied to the EMIF sdram_config register when it is coming out of DeepSleep0 in order to ensure that the EMIF comes up for the correct type of DDR. Without this, resume can hang from within the kernel. Signed-off-by: Dave Gerlach --- arch/arm/cpu/armv7/am33xx/ddr.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/cpu/armv7/am33xx/ddr.c') diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index 4173a10b143..9a625c46613 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -96,6 +96,7 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int nr) writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl); writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config); + writel(regs->sdram_config, &cstat->secure_emif_sdram_config); if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2) { configure_mr(nr, 0); -- cgit v1.2.3