From dd3ecf020ec6e1932c473ef504e56a036b52bd4e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 28 Apr 2013 14:17:45 +0000 Subject: arm: mx23: Fix VDDMEM misconfiguration The VDDMEM ramped up in very weird way as it was horribly misconfigured. Instead of setting up VDDMEM in one swipe, let it rise slowly the same way as VDDD and VDDA in spl_power_init.c and then only clear ILIMIT before memory gets inited. This makes sure the VDDMEM rises sanely, not jumps up and down as it did till now. The VDDMEM prior to this change did this: 2V0____ .--------2V5 | `--' 0V____| The VDDMEM now does this: 2V0_____,-----------2V5 / 0V__| Moreover, VDDIO on MX23 uses 25mV steps while MX28 uses 50mV steps, fix this difference too. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic --- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) (limited to 'arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c') diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 3902406441e..07db27927f4 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -256,17 +256,9 @@ static void mx23_mem_setup_vddmem(void) struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; - writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | - POWER_VDDMEMCTRL_ENABLE_ILIMIT | - POWER_VDDMEMCTRL_ENABLE_LINREG | - POWER_VDDMEMCTRL_PULLDOWN_ACTIVE, - &power_regs->hw_power_vddmemctrl); + clrbits_le32(&power_regs->hw_power_vddmemctrl, + POWER_VDDMEMCTRL_ENABLE_ILIMIT); - early_delay(10000); - - writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | - POWER_VDDMEMCTRL_ENABLE_LINREG, - &power_regs->hw_power_vddmemctrl); } static void mx23_mem_init(void) -- cgit v1.2.3