From 0b38fffbe413fc0725c750d046ca62c23fca196e Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 5 Dec 2012 10:48:47 +0000 Subject: mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems It could happen (1 out of 100 times) that NAND did not start up correctly after warm rebooting, so we end up with various failures or DMA timed out due to a stalled BCH. When resetting BCH together with GPMI, the issue could not be observed anymore (after 10000+ reboots). We probably need the consistent state already before sending commands to NAND. This behaviour was observed in barebox and kernel, so I assume it affects U-Boot as well. I chose to keep the extra reset for BCH when changing the flash layout to be on the safe side. Signed-off-by: Wolfram Sang Acked-by: Marek Vasut --- drivers/mtd/nand/mxs_nand.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 4701be846c6..e38e1512540 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -1058,6 +1058,8 @@ int mxs_nand_init(struct mxs_nand_info *info) { struct mxs_gpmi_regs *gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE; + struct mxs_bch_regs *bch_regs = + (struct mxs_bch_regs *)MXS_BCH_BASE; int i = 0, j; info->desc = malloc(sizeof(struct mxs_dma_desc *) * @@ -1081,6 +1083,7 @@ int mxs_nand_init(struct mxs_nand_info *info) /* Reset the GPMI block. */ mxs_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg); + mxs_reset_block(&bch_regs->hw_bch_ctrl_reg); /* * Choose NAND mode, set IRQ polarity, disable write protection and -- cgit v1.2.3 From 71779d5b873186941652188a30bf703c951b1616 Mon Sep 17 00:00:00 2001 From: Eric Benard Date: Tue, 11 Dec 2012 11:36:21 +0000 Subject: m28evk/mx28evk: fix nand_update_full MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - since commit 418396e212b59bf907dbccad997ff50f7eb61b16 nand write.raw can take the number of page to be written as an argument. nand_update_full is passing the size (in bytes) to nand write.raw. This value was previously ignored but now breaks the write. - this patch updates the default environment of these boards to provide a pagecount instead of a size to nand write.raw. - tested on a mx28evk with a 4k page NAND and on a custom board with a 2k page NAND. Signed-off-by: Eric Bénard Cc: Marek Vasut Cc: Fabio Estevam Acked-by: Marek Vasut --- include/configs/m28evk.h | 2 +- include/configs/mx28evk.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index b49ec8c7dd6..3f37e8430c5 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -297,7 +297,7 @@ "if tftp ${update_nand_full_filename} ; then " \ "run update_nand_get_fcb_size ; " \ "nand scrub -y 0x0 ${filesize} ; " \ - "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \ + "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \ "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 2916c710e41..3d4a601ec2a 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -263,7 +263,7 @@ "if tftp ${update_nand_full_filename} ; then " \ "run update_nand_get_fcb_size ; " \ "nand scrub -y 0x0 ${filesize} ; " \ - "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \ + "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \ "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ -- cgit v1.2.3