From 42e29f2f41f56e8b98608222123c833f45fbcff2 Mon Sep 17 00:00:00 2001 From: Ravi Gunasekaran Date: Wed, 14 Feb 2024 16:22:01 +0530 Subject: arm: dts: k3-j722s: Redefine USB1 node description USB1 controller on J722S and AM62P are from different vendors. Redefine the USB1 node description for J722S by deleting the node inherited from AM62P dtsi. Signed-off-by: Ravi Gunasekaran --- arch/arm/dts/k3-j722s.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/dts/k3-j722s.dtsi b/arch/arm/dts/k3-j722s.dtsi index d689845418..0e94c596cc 100644 --- a/arch/arm/dts/k3-j722s.dtsi +++ b/arch/arm/dts/k3-j722s.dtsi @@ -13,6 +13,13 @@ #include "k3-am62p5.dtsi" +/* + * USB1 controller on AM62P and J722S are of different IP. + * Delete AM62P's USBSS1 node definition and redefine it for J722S. + */ + +/delete-node/ &usbss1; + / { model = "Texas Instruments K3 J722S SoC"; compatible = "ti,j722s"; @@ -81,6 +88,38 @@ clock-frequency = <0>; }; + usbss1: cdns-usb@f920000 { + compatible = "ti,j721e-usb"; + reg = <0x00 0x0f920000 0x00 0x100>; + power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 278 3>, <&k3_clks 278 1>; + clock-names = "ref", "lpm"; + assigned-clocks = <&k3_clks 278 3>; /* USB2_REFCLK */ + assigned-clock-parents = <&k3_clks 278 4>; /* HF0SC0 */ + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + usb1: usb@31200000{ + compatible = "cdns,usb3"; + reg = <0x00 0x31200000 0x00 0x10000>, + <0x00 0x31210000 0x00 0x10000>, + <0x00 0x31220000 0x00 0x10000>; + reg-names = "otg", + "xhci", + "dev"; + interrupts = , /* irq.0 */ + , /* irq.6 */ + ; /* otgirq */ + interrupt-names = "host", + "peripheral", + "otg"; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + }; + serdes_wiz0: wiz@f000000 { compatible = "ti,am64-wiz-10g"; #address-cells = <1>; -- cgit v1.2.3