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2009-10-07* Following Bugs fixed(identified in Pre-alpha release). 1. DDR hang at 400 ↵Poonam Aggrwal
(Bug Id 3536) 2. Environment (Bug Ids 3577, 3578) * SYSCLK changes for P2020RDB RevC Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07Environment updated with different boot commands for P2020RDBPoonam Aggrwal
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-Add-RTC-SupportDipen Dudhat
RTC support added for P2020RDB
2009-10-07NAND boot changes for P2020RDB RevB. Mainly related to DDR size, DDR ↵Poonam Aggrwal
configuration and SYSCLK values. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-RevA-DDR-fixesPoonam Aggrwal
Modified DDR Settings for P2020RDB REV-A Board. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-RevB-DDR-changesPoonam Aggrwal
P2020RDB RevB changes mainly for DDR settings Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07NAND boot support for P1 P2 RDB PlatformsPoonam Aggrwal
Switch options for NAND boot are SW[1:4]='0101" To Boot from NAND 1. tftp 1000000 u-boot-nand.bin 2. nand erase 0 80000 3. nand write 1000000 0 80000 4. Change the Switch settings to boot from NAND. 5. reset the board. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-USB-mpc85xx-supportVivek Mahajan
Add USB support for P2020RDB and 85xx platforms Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-SYSCLK-detected-from-GPIO10Poonam Aggrwal
SYSCLK getting detected from GPIO10 If GPIO10 = 0... SYSCLK = 66Mhz If GPIO10 = 1... SYSCLK = 50Mhz Board REV getting detected from GPIO11 If GPIO11 = 0... REV A board If GPIO11 = 1... REV B board. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-Defines-for-CONFIG_ETHPoonam Aggrwal
Added missing defines for CONFIG_ETH0, CONFIG_ETH1, CONFIG_ETH2. In case they are not defined the u-boot does not fixup mac addresses in the device tree. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-SDCARD-boot-supportDipen Dudhat
SDCARD boot support for P2020RDB Make a special uboot used for booting from SDcard for P2020RDB platform. This patch uses sdboot support for 8536DS posted by Mingkai Hu. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-SD-and-SPI-4-bit-data-modeDipen Dudhat
SD and SPI 4-bit data transfer mode selected Make both[SD and SPI] work at the same time. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-PIO-mode-for-P2020-eSDHCDipen Dudhat
Enable PIO mode for eSDHC Controller on P2020 Platform Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-PIO-mode-support-for-eSDHC-DriverDipen Dudhat
PIO Mode support for Freescale eSDHC Controller Driver Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-Boot-from-SDcard-MPC8536DS-v2Jason Jin
Make a special uboot used for booting from SDcard or SPI flash This Patch is borrowed from MPC8536DS SD Card Boot. This patch is used to generate a special version u-boot, together with the data structure on the SDcard/SPI flash, can be used to booting from SDcard/SPI flash on 8536DS board. The boot ROM in CPU and the data structure on SD card will initialize the DDR, set a large tlb0 for DDR and CCSR, set law0 for DDR. The special version uboot avoid initializing the DDR. Try to reseve the law0 for DDR by adding a CONFIG_SYS_RESERVED_LAW0 macro for the "dynamic law allocation" code. But keep the original tlb initialize code for DDR, disabled the large tlb0 which was set in the boot ROM. This patch is intend for those who are interested in the function of booting from SD card on 8536DS board and not for opensource. An utility is needed to write the data structure and the special version u-boot onto the SD card which has filesystem on it or onto the SPI flash. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-eSPI-controller-support-MPC8536DSMingkai Hu
Add eSPI controller support under the SPI framework. This Patch borrowed from MPC8536DS SPI Support. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-eSPI-register-support-MPC8536DSMingkai Hu
Add the eSPI register support This patch borrowed from MPC8536DS Platform SPI Support Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-Support-for-P1-P2-RDB-platforms-v2Poonam Aggrwal
Support for P20x0 RDB Platforms. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-Support-of-P1-P2-processors-v2Poonam Aggrwal
Adds support for P20x0 processors of QorIQ series. The processors are Low end and Ultra Low End products in QorIQ series. All are e500 based with small variations. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-DDR-data-width-from-SVRPoonam Aggrwal
DDR data width getting detected dynamically based on SVR value. Would be helpful to cater more than one similar platforms with a single u-boot image. (for example, P1020(32 bit DDR), P2020(64 bit DDR)) Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-Removed-CONFIG_NUM_CPUS-for-85xxPoonam Aggrwal
Removed CONFIG_NUM_CPUS for 85xx processor series. Instead the num of cores is determined dynamically by reading the SVR values. This can help to use the same u-boot image across the platforms. Added CONFIG_MAX_CPUS value 8. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-Second-UART-for-mpc85xxPoonam Aggrwal
Adds the support of second UART port for MPC85xx based platforms. Defining the next two configs allows to switch the serial port from the console using the setenv stdin and stdout Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
2009-10-07u-boot-2009.03-p2020rdb-GPIO-registers-to-mpc85xx-mapPoonam Aggrwal
Adds GPIO registers to MPC85xx memory map
2009-03-18mpc52xx: Get rid of board-specific #ifdef's in cpu/mpc5xxx/ide.cGrzegorz Bernacki
Total5200 and digsy MTC use I2C port 2 pins as a ATA chip select. To avoid adding board-specific ifdefs to cpu/mpc5xxx/ide.c new define CONFIG_SYS_ATA_CS_ON_I2C2 was introduced. It is used by Total5200 and will be used by digsy MTC and other boards with ATA CS on I2C pins. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-03-188xx: add support for new keymile kmsupx4 board.Heiko Schocher
This patch adds support for the kmsupx4 board from Keymile, based on a Freescale MPC852T CPU - serial console on SMC1 - 32 MB SDRAM - 32 MB NOR Flash - Ethernet over SCC3 - I2C Bitbang Signed-off-by: Heiko Schocher <hs@denx.de>
2009-03-188xx, mgsuvd: rename board to a more generic nameHeiko Schocher
renaming the "mgsuvd" board port into "km8xx", because there come more similar boards from keymile. Compiling the mgsuvd board with "make mgsuvd_config" remains. Signed-off-by: Heiko Schocher <hs@denx.de>
2009-03-188xx, mgsuvd: Coding Style cleanup config fileHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-03-18powerpc: common updates for keymile boardsHeiko Schocher
- added to keymile-common.h: - bootcount support - COMMAND HISTORY - CONFIG_AUTO_COMPLETE - CONFIG_SYS_FLASH_PROTECTION - JFFS2 support - CONFIG_VERSION_VARIABLE - extracted common I2C settings for all boards - common default environment settings summarized Signed-off-by: Heiko Schocher <hs@denx.de>
2009-03-188xx, icache: enabling ICache not before running from RAMHeiko Schocher
with the new CONFIG_SYS_DELAYED_ICACHE config option, ICache is not enabled before code runs from RAM. Signed-off-by: Heiko Schocher <hs@denx.de>
2009-03-1882xx, mgcoge: fix environment sector sizeHeiko Schocher
Size of one environment sector is 0x20000. Signed-off-by: Heiko Schocher <hs@denx.de>
2009-03-18NetStar: config reindentationLadislav Michl
Fix indentation broken by symbol renames. "Sort" driver related definitons. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2009-03-17ColdFire: Fix incorrect definitionTsiChung Liew
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2009-03-17ColdFire: Provide gzip image size V2 & V3 platformsTsiChung Liew
Default gzip bootm size is 8MB. Some platforms require more than 8MB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2009-03-15Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk
2009-03-13OMAP3: Add support for OMAP3 die IDDirk Behme
Read and store OMAP3 die ID in U-Boot environment. Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-03-12sh: Fix cannot work rtl8139 on r2dplusYoshihiro Shimoda
The rtl8139 driver use pci_mem_to_phys. So it need PCI system memory registration. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-03-12sh: Add support 32-Bit Extended Address Mode to sh7785lcrYoshihiro Shimoda
We can built 'make sh7785lcr_32bit_config'. And add new command "pmb" for this mode. This command changes PMB for using 512MB system memory. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-03-12sh: Add some register value configurable to PCI of SH7780Yoshihiro Shimoda
Some register value was hardcoded for System memory size 128MB and memory offset 0x08000000. This patch fixed the problem. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-03-12sh: Add value for PCI system memory registration of sh7785lcrYoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-03-12sh: Add macros for SH-4A 32-Bit Address Extended ModeYoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-03-09Add eTSEC 1/2 IO override control (corrected)ksi@koi8.net
This adds tsec12ioovcr to include/asm-ppc/immap_85xx.h (was reserved.) Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
2009-03-09Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk
Conflicts: lib_ppc/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-03-0583xx, kmeter1: updates for 2009.03Heiko Schocher
- HRCW update HRCWH_BOOTSEQ_DISABLE not HRCWH_BOOTSEQ_NORMAL HRCWH_LALE_EARLY added - DDR-SDRAM settings modified. This solves sporadically problems with this memory. - CS1 now 128 MB window size - CS3 now 512 MB window size - PRAM activated - MTDPARTS_DEFAULT defined - CONFIG_HOSTNAME added - MONITOR_LEN now 384 KB Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-0583xx, kmeter1: autodetect size of DDR II RAMHeiko Schocher
it is possible that some board variants have different DDR II RAM sizes. So we autodetect the size of the assembled RAM. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-0583xx, kmeter1: add I2C, dtt, eeprom supportHeiko Schocher
This patch adds I2C support for the Keymile kmeter1 board. It uses the First I2C Controller from the CPU, for accessing 4 temperature sensors, an eeprom with IVM data and the booteeprom over a pca9547 mux. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05MPC8349ITX: several config issues fixedValeriy Glushkov
The previous version rebooted forever with DDR bigger than 256MB. Access the DS1339 RTC chip is on I2C1 bus. Allow DHCP. Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-24Merge branch 'master' of git://git.denx.de/u-boot-videoWolfgang Denk
2009-02-24Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk
2009-02-24ARM: add an "eet" variant of the imx31_phycore boardGuennadi Liakhovetski
The "eet" variant of the imx31_phycore board has an OLED display, using a s6e63d6 display controller on the first SPI interface, using GPIO57 as a chip-select for it. With this configuration you can display 256 colour BMP images in 16-bit RGB (RGB565) LCD mode. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-02-24LCD: support 8bpp BMPs on 16bpp displaysGuennadi Liakhovetski
This patch also simplifies some ifdefs in lcd.c, introduces a generic vidinfo_t, which new drivers are encouraged to use and old drivers to switch over to. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
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