Age | Commit message (Collapse) | Author |
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DSP is woken-up by default on DA850/OMAP-L138.
To prevent DSP from being woken up, set the environment variable
dspwake to no.
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This patch adds support to print the DDR frequency information
when u-boot is coming up. This patch reads teh CFGCHIP3 to
findout the clock source of emifb and then prints the
relevant information.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
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supported.
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Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
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The NAND was non-standard layout because of which it was incompatible
with Linux layout.
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CONFIG_ENV_IS_NOWHERE was not defined right.
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1) 4-bit ECC not used.
2) BBT not used
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Flash on da850 EVM.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
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1) Change ttyS0 to ttyS2
2) Use ramdisk as the default filesystem
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This change is as per the latest da850 schematics.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
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and UART0. Also modify the SPI1 base address and SPI clock source. Change the UART and SPI related pinmux and LPSC in the board file.
These changes are as per the latest da850 schematics.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
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Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
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Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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This allows simpler config files as well as make files.
Compile tested on DA830 and DA850
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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region to which NAND chip is connected.
Signed-off-by: Sudhakar Rajashekara <sudhakar.raj@ti.com>
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Signed-off-by: Sudhakar Rajashekara <x0096290@linux-psp-server.(none)>
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Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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A side-effect of this is that it allows geting PLLM and PLLC clocks for PLL1
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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same place
Also make JTAG ID use BOOTCFG base
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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The EMAC driver currently hardcodes the RMII speed 100 bit. This will not work
when there is a real phy connected.
Tested on DA830.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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the get_link_speed API actually returns the link status. So call it
get_link_status instead.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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The kick registers need to be unlocked once in ARM UBL after DSP is put
to sleep and should never be locked again - either in kernel or U-Boot
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Signed-off-by: Sudhakar Rajashekara <sudhakar.raj@ti.com>
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Signed-off-by: Sudhakar Rajashekara <sudhakar.raj@ti.com>
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Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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cleanup da850 build to not create seperate directory for DA850. DA850/DA830
specific code can use CONFIF_{DA830|DA850}_SOC - the preferred way would be
to use runtime check - but that facility is not present currently.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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This code has been only compile tested for SPI and NAND boot modes.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
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Tested for SPI and NAND boot mode on Primus EVM.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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This patch adds esd's loadpci BSP command to CPCI4052 and
CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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- Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode,
all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0
can not access PIXIS_BASE anymore (any access will cause DataTLBError exception)
- Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately. This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
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Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately. This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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