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2012-08-22Initial Toradex Colibri T20 L4T R15 support.T20_LinuxImageV2.0Alpha1_20120808Marcel Ziswiler
2012-03-13x86: config: Turn on the CONFIG_SYS_64BIT_LBA option for corebootGabe Black
BUG=chrome-os-partner:8180 TEST=Built and booted on emeraldlake2 and Stumpy. Change-Id: If14ff4930015fae36d421fd30ab5bd126c464db9 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/18059 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2012-02-27tegra: configs: enable warm boot on CardhuVarun Wadekar
enable CONFIG_TEGRA_LP0 and CONFIG_TEGRA3_WARMBOOT BUG=chromium-os:23496 TEST=build and boot on Cardhu Change-Id: If21303468193c7f5f6ba1c0c0b7cd0ccb5a08c0e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13801
2012-02-27tegra: configs: enable warm boot on WaluigiVarun Wadekar
enable CONFIG_TEGRA_LP0 and CONFIG_TEGRA3_WARMBOOT BUG=chromium-os:23496 TEST=build and boot on Waluigi Change-Id: I622d228d02767954ffa7e101ad6f5f5fb1146702 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13802
2012-02-27arm: tegra3: add warmboot code needed for LP0Varun Wadekar
BUG=chromium-os:23496 TEST=build and boot on Waluigi, Cardhu by enabling CONFIG_TEGRA_LP0 and CONFIG_TEGRA3_WARMBOOT. odification of the work done by: a. Jimmy Zhang <jimmzhang@nvidia.com> b. Yen Lin <yelin@nvidia.com> c. Wei Ni <wni@nvidia.com> Change-Id: If2fa63ccd23341694955bca25fb5cfc4a8a805ad Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13800
2012-02-16arm: config: tegra: add bct offset addressVarun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I32dbfa02ac1d6954b3a7e515914fbc0b6695f98b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14683
2012-02-14arm: tegra2: split LP0 code to help future chipsVarun Wadekar
split the LP0 code for tegra2 into common LP0 code and chip specific warm boot code BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: Ie04bf9ac17482a37afd0f4515dc3aafeb4f48ae7 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/15883
2012-02-08Revert "arm: tegra2: split LP0 code to help future chips"Brian Harring
This reverts commit 4c7502242627f64d91432cb4958be5f93f65fbff Don't think this is the cause of http://code.google.com/p/chromium-os/issues/detail?id=26116, but it was in the same batch so I'm reverting in the process. Change-Id: Icc013ced6c22e29d569ee4ca8ef73522154ec1a8 Reviewed-on: https://gerrit.chromium.org/gerrit/15561 Reviewed-by: Brian Harring <ferringb@chromium.org> Tested-by: Brian Harring <ferringb@chromium.org>
2012-02-08arm: tegra2: split LP0 code to help future chipsVarun Wadekar
split the LP0 code for tegra2 into common LP0 code and chip specific warm boot code BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: Id9756c08f61502affa8beee636d883d01468e6ec Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13799
2012-02-07tegra: Rename "CONFIG_VIDEO_TEGRA2" to "CONFIG_VIDEO_TEGRA"Puneet Saxena
Enables common LCD support for Tegra2 and Tegra3 BUG=chromium-os:23496 TEST=Built ok for Cardhu, Waluigi and Seaboard. Change-Id: I938824045440cc4964c2ac6bf727a90ee5f129b4 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14692
2012-02-07arm: Tegra3: Add initrd ATAG support to all Tegra3Varun Wadekar
Helps kernel developers using kernels with custom ramdisk images. Some developers who would like to work with upstream kernel specifically requested for this feature, since it helps them during early development days. BUG=chromium-os:23496 TEST=build and boot on Cardhu, Waluigi Change-Id: I698da421bf924a5c86229a80c0a25021d3e6f046 Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14475 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
2012-02-07tegra: config: waluigi: Enable keyboard support for WaluigiPuneet Saxena
Add Keyboard config options CONFIG_TEGRA_KEYBOARD and CONFIG_KEYBOARD. BUG=chromium-os:23496 TEST=Tested on Waluigi. key press echoes the key on console. Build OK for cardhu. Change-Id: I7856f2d22c935a4a94f91c67263913e1240f25b5 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13790 Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
2012-02-06tegra: config: Rename CONFIG_TEGRA2_KEYBOARDPuneet Saxena
Replace Tegra2 specific tag "CONFIG_TEGRA2_KEYBOARD" by common tag "CONFIG_TEGRA_KEYBOARD" to include tegra keyboard driver. BUG=chromium-os:23496 TEST=Build ok for Cardhu,Seaboard and Waluigi. Change-Id: Idd16990ba525b8391c3c14e37efd5587f09a25c8 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13860 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-05tegra: waluigi: enable LCD supportPuneet Saxena
BUG=chromium-os:23496 TEST=Built ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: Ifb4deba51137251ea0564bf3e66f33f7c62420e4 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14701 Reviewed-by: Simon Glass <sjg@chromium.org>
2012-01-18configs: waluigi: remove pmuboard kernel argPuneet Saxena
BUG=chromium-os:23496 TEST=Build ok for Waluigi,Cardhu and Seaboard. "printenv bootargs" shows the changed kernel arg on Waluigi. Change-Id: I87934f9a887c367098152ac753f98681760ec160 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13797 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Olof Johansson <olofj@chromium.org>
2012-01-13Coreboot: Compile out disk partition and file system codeGabe Black
The code which provides GPT support has some potential security issues in it. Since we're not using it anyway, we might as well just turn it off. BUG=chromium-os:25041 BUG=chromium-os:25042 TEST=Built and booted on Lumpy with various options turned on and off. Signed-off-by: Gabe Black <gabeblack@google.com> Change-Id: I7618ba1a34e553094c1cd96bfe892c9c6d0f02ba Reviewed-on: https://gerrit.chromium.org/gerrit/14180 Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2012-01-13config: coreboot: allow to unregister input devicesVincent Palatin
Allow to reconfigure properly the USB keyboard driver when we enumerate several times the USB devices and its position in the device tree has changes. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:7188 chrome-os-partner:7430 chrome-os-partner:7432 chrome-os-partner:7559 TEST=On lumpy with usb keyboard configured, run in recovery mode, insert a bad key, press tab, remove the key, press tab. The recovery info are displayed properly. Change-Id: Ief5e25879fe75fb6371a089a310c5d6af662252f Reviewed-on: https://gerrit.chromium.org/gerrit/14188 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
2012-01-05Add option to tftp kernel then boot from eMMCSimon Glass
The mmc0_tftpboot option reads a kernel using TFTP but then boots from eMMC. This allows kernel development without resorting to NFS root (which changes some parts of the boot process). BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: I23c0890f76dc63dde128d7137d8891341761c884 Reviewed-on: https://gerrit.chromium.org/gerrit/13280 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2012-01-05CHROMIUM: config: Skip LCD final init for secure bootSimon Glass
The vboot command makes sure that the LCD init is completed so we don't need this in board_late_init(). Overall the LCD init optimization reduces boot time by about 150ms. BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: Idcefb81108d0499bb208f8b3d90df65ca4cb6349 Reviewed-on: https://gerrit.chromium.org/gerrit/13206 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2012-01-05tegra: config: Enable BOARD_LATE_INIT to complete LCD initSimon Glass
LCD final init is now kept in board_late_init(), so we need to enable this feature in the config. BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: Ib895c2768359439349714805cea6ff636c2307b3 Reviewed-on: https://gerrit.chromium.org/gerrit/13214 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2012-01-04Do not use CONTROL_EP method of getting USB keyboard eventsPatrick Georgi
The GetReport request isn't implemented in all keyboards, so use interrupt transfers instead. BUG=chrome-os-partner:5752 TEST=Use USB keyboard in u-boot (recovery mode) Change-Id: Ided3289ef86ee9899813582c9f137526399ad2f8 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: https://gerrit.chromium.org/gerrit/13491 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
2011-12-21CHROMIUM: config: delay console init until after relocationSimon Glass
Turning on this option saves about 20ms boot time. BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: I06ec0ae0da4afc208ca7952dfa42e725f5a67d4c Reviewed-on: https://gerrit.chromium.org/gerrit/13208 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-12-14Tegra3: Cardhu: Fix Cardhu buildTom Warren
BUG=chromium-os:23496 TEST=built and booted Cardhu to cmd prompt; USB, MMC, SPI all work. This build is to allow developers that don't have a Waluigi to still contribute to porting/upstreaming T30 U-Boot code/patches. Signed-off-by: Tom Warren <twarren@nvidia.com> Change-Id: I5978cbe33bfc9329f420c32eb5ca97b9b302029c Reviewed-on: https://gerrit.chromium.org/gerrit/12932 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-12-13arm: Tegra3: enable USB supportTom Warren
BUG=chromium-os:23496 TEST=build and boot Waluigi T30. Usb detects devices OK. usb tree, usb part, ext2ls usb and ext2load usb work as expected. Signed-off-by: Tom Warren <twarren@nvidia.com> Change-Id: I40910e0c770bb33171ad9c8b4e5a6baaaac4a7df Reviewed-on: https://gerrit.chromium.org/gerrit/12392 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org>
2011-12-12CHROMIUM: Make config names consistentChe-Liang Chiou
In making config names consistent, this commit renames configs following the "chromeos_${BOARD}" naming convention. The old config names are kept before portage overlays are set to the new config names to prevent builders from break. They will be removed in next commit. BUG=chromium-os:23869 TEST=Run script snippet below successfully >>>> for BOARD in lumpy \ stumpy \ tegra2_aebl \ tegra2_arthur \ tegra2_asymptote \ tegra2_dev-board \ tegra2_dev-board-opengl \ tegra2_kaen \ tegra2_seaboard \ tegra2_wario \ waluigi \ x86-alex \ x86-alex_he \ x86-mario \ x86-mario64 do ebuild-${BOARD} /path/to/chromeos-u-boot-9999.ebuild configure done <<<< Change-Id: I984bea648f6d8384facce9771a7a5de3b169108c Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/12671 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-12-12tegra: Remove CONFIG_SYS_PLLP_BASE_IS_408MHZSimon Glass
This setting is now in the fdt, so remove the CONFIG item. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I336a6cc2140c725fdda85330efe617f82f205a90 Reviewed-on: https://gerrit.chromium.org/gerrit/12250 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-12-08Make u-boot use the new PCHVadim Bendebury
New device ID range is included to allow the SPI driver to use the Panther Point based controller and a new device ID is checked when attaching the AHCI controller. BUG=chrome-os-partner:7112 TEST=manual After this change the top of the tree ChromeOS can be booted on IVB reworked Stumpy platforms. Change-Id: Ia41c17b58337cde2d041990b3d1c9da37c0cd92c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/12606
2011-12-08config: coreboot: enable USB keyboardVincent Palatin
Enable the compilation of USB keyboard driver code and the associated polling code to detect keypress with the EHCI controller. BUG=chrome-os-partner:5752 TEST=tested on Stumpy and Lumpy, with and without usb-keyboard set in the device tree, check Ctrl+U, Ctrl+D and space are working as expected. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Change-Id: I424758ad6a30d01b5858ddaff6e4494a40e79f83 Reviewed-on: https://gerrit.chromium.org/gerrit/12582 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2011-12-07tegra: config: Remove unused CONFIG itemsSimon Glass
We don't need the default serial clock now, since we try with both options. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I68a80174e10b299c46742d36291d839ea9fa6d7c Reviewed-on: https://gerrit.chromium.org/gerrit/12249 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org>
2011-11-22Revert "Remove NAND support to reduce code size"Simon Glass
This reverts commit fab63e9aacc49a3d224df47b6d0e23dc6b73de40. Change-Id: I4ce3622871374baa7da19263cbe38603b4f9e356 Reviewed-on: https://gerrit.chromium.org/gerrit/11943 Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org>
2011-11-17Remove NAND support to reduce code sizeSimon Glass
Perhaps due to a toolchain change or the recent TFTP changes, U-Boot no longer fits in the space available. This removes NAND support to give us time to expand the space and/or fix the toolchain. TBR=U-Boot suddenly grew for no immediately obvious reason, quick fix. http://build.chromium.org/p/chromiumos/builders/tegra2%20seaboard%20full/builds/924/steps/cbuildbot/logs/stdio TEST=build U-Boot and see that it is about 40KB smaller. Change-Id: Iec02cc4da57cac7e79355714000f3e5d31c326c4 Reviewed-on: https://gerrit.chromium.org/gerrit/11895 Reviewed-by: Yasuhiro Matsuda <mazda@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-11-15tegra: enable SPI on Cardhu and WaluigiChe-Liang Chiou
BUG=chromium-os:21033 TEST=run `sf erase, write` and `sf read` on Waluigi verify the data it reads from SPI flash matches that it writes to Change-Id: Ibeefd3183e4fa367d68d0035a818e1c166e6d59d Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/11473 Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org>
2011-11-15tegra: spi: add SFLASH and SLINK driversChe-Liang Chiou
BUG=chromium-os:21033 TEST=run `sf erase, write` and then `sf read` on seaboard verify the data it reads from SPI flash matches that it writes to Change-Id: I1b04afa4b54738cd93be29b70f428bdc3e6b234f Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/11472 Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org>
2011-11-13spi: rename tegra2_spi to tegra_spi in prep for tegra3Che-Liang Chiou
BUG=chromium-os:21033 TEST=build seaboard successfully Change-Id: Idbfbdbf0bdb1070f4a2b5f8205c1caff6ef0c811 Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11471 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-11-04Introduce ability to use hardware SPI mapping for read accesses.Vadim Bendebury
On X86 systems the hardware maps the bootprom SPI flash chip into the top of memory address range. This could be used for accessing all information in the SPI flash. The vboot-reference code requires access to FMAP sections containing cryptographic information, and as of today, u-boot reads the whole sections, which are 64 KB in size, even though the actual areas accessed by vboot-reference are much smaller. A much faster way of accessing this information would be just passing around pointers to the appropriate memory areas. This would eliminate one copy, and also would make sure that only the areas actually accessed get fetched from SPI flash. This patch provides this ability trying to keep code changes to a minimum. New feature is enabled by defining CONFIG_HARDWARE_MAPPED_SPI. The firmware storage API for file reads changes when the new configuration option is set: a pointer to pointer to buffer is passed to the read_spi() function instead of a pointer to buffer. When the new feature is enabled the read_spi() function sets the pointer value to point to the requested data instead of copying the data into the buffer. A new data type is introduced (read_buf_type), which is set to be a (void *) if the new feature is not enabled, or (void **) otherwise. This type is used as the buffer pointer in the spi_read() function. Code allocating/freeing buffers used to keep data read from SPI flash is now conditionally compiled. Call sites for the spi_read() function are modified to adjust the buffer pointer parameter (pass the address of the parameter instead of the parameter, when the new feature is enabled). gbb field access functions can be aliased to gbb_init(), as they all in fact do the same - read a certain section of the gbb area. This change does not benefit the ARM implementations, and makes the code more complicated that it should be. Some u-boot rearchitecture along with vboot_reference API enhancements could address this. A tracking issue (http://code.google.com/p/chromium-os/issues/detail?id=22528) has been opened for that. BUG=chrome-os-partner:6585, chromium-os:22528 TEST=manual . build a new stumpy firmware image . boot the stumpy, observe it start up chromeos. . assess the boot timing using the cbmem.py utility (this modification shaves in excess of 100ms off the boot time). . disable the new feature, build a stumpy image, observe that is still boots chromeOs. . run emerge-terga2_kaen chromeos-u-boot to confirem that ARM version builds cleanly. Change-Id: I4e6ab530d24f5771b5a86a48d3f3135101b469a6 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11152
2011-11-03CHROMIUM: config: Config options to allow us to boot a kernelDoug Anderson
With this set of config options we can now boot the kernel. With the kernel I have, it doesn't work yet, but at least it prints out some messages to the UART. BUG=chromium-os:21540 TEST=If I have a reasonable kernel in MMC1, I see that it can boot quite a ways into the kernel w/ autoboot. Change-Id: I5918fff3d48f2ff9f2bac9261c84e08e60a1560a Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10675
2011-10-28CHROMIUM: waluigi: config: Turn on MMC for waluigi.Doug Anderson
BUG=chromium-os:21540 TEST=Able to use mmc. Change-Id: I1d566f08f9dd115b5be1a05ffa0ff07b508e0cee Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10663
2011-10-28Remove generic MMC support from the coreboot configGabe Black
The MMC reader looks like a USB device, so we don't need to support generic MMC devices directly. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Change-Id: Id5729cd9d51e0c4cb2570b9b452f96bd23764b85 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10755 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-28Add a high level option to the coreboot config to control network supportGabe Black
We aren't currently planning to have network support in production firmware. If we need it at some point, we can easily turn that support back on. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy Change-Id: Iad265bb2bbae5360135eaa8577cc6dfde95045f9 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10754 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-28Add a high level option to the coreboot config to control IDE supportGabe Black
Disable it by default since we're using the SCSI interface now. Being able to turn IDE back on later might be necessary if we haven't gotten AHCI support working on a new platform yet. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Change-Id: I07e80dc2673529f3f2ec52431e1c0958511539b0 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10753 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-28Refactor the coreboot config to separate out command line optionsGabe Black
Also disable those options. This way they can be enabled when needed, but when you aren't expecting to use the command line (most of the time) they can be excluded to reduce u-boot's size and load time. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Change-Id: I7ea0f02a1aa3537fa4282822bbc0d4976c2b1383 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10752 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-28CHROMIUM: waluigi: config: Turn on PMU for waluigi.Doug Anderson
BUG=chromium-os:21540 TEST=With MMC change and MMC config change, was able to use MMC. Change-Id: I61d543cbf7b2b6d885dd641b35b7c33cd85b51d6 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10662
2011-10-28mmc: tegra: Rename tegra2_mmc to tegra_mmc in prep for tegra3Doug Anderson
BUG=chromium-os:21540 TEST=Built u-boot and booted u-boot on tegra2_kaen Change-Id: Id6f11512ea1a95bd57b600601b488ae20b34db2d Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10808 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-26Move the initial location of u-boot so it doesn't overlap ramoopsGabe Black
The current location overlaps with the ramoops area, but due to a bug in coreboot, this is only detected if coreboot is small enough to fit entirely in that area. BUG=chrome-os-partner:6649 TEST=Built and booted on Stumpy. Change-Id: I5f9dbfe2434d42c216257413a6f8b3dd345e087e Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10751 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
2011-10-25pmu: Allow inclusion of PMU code without turning on clock scalingDoug Anderson
We may want to use the PMU to adjust various voltages even if we don't have clock scaling. Separate these two conecpts. BUG=chromium-os:21540 TEST=Compiled for Seaboard Change-Id: I376afe7e795fd2dd8035186c58f48a552391b4d1 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10457
2011-10-20CHROMIUM: waluigi: config: Add i2c commandsDoug Anderson
BUG=chromium-os:21540 TEST=Saw that I could run i2c probe on busses 0-3 Change-Id: I291a7d208843e146738830eda62ccf9849503a17 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10367 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-13CHROMIUM: tegra: config: Add vmalloc to command line.Doug Anderson
This was added to the non-legacy kernel boot command line in <http://gerrit.chromium.org/gerrit/8373>. Since legacy has its own command line, we need it too. BUG=chromium-os:21650 TEST=Booted a newer kernel with this change and saw vmalloc=234MB. Change-Id: I1daaa71ce63892ef4534722caa705c4e9608c6ed Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10033 Reviewed-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-12[PATCH2/2] mrc cache: Handle MRC cache data.Vadim Bendebury
This change adds a chromebook-x86 platform specific initialization which does the following: - find MRC cache in the SPI flash using the FMAP data - compare the cache contents passed by coreboot through CBMEM with the contents saved in the SPI flash - if the two do not match and the new contents would fit into the FMAP allocated room - update the contents in the SPI flash. BUG=chrome-os-partner:5808 TEST=manual . build the new firmware image . place the updated coreboot/util/cbmem/cbmem.py utility into /var on a Stumpy (the target) configured for ssh communications . program the new image on the target . reboot the target and wait for it to come up to ChromeOS login screen . run the following from the host: (host) ssh 172.22.75.233 egrep "'(handle|prepare)_mrc'" /sys/firmware/log prepare_mrc_cache: MRC cache not initialized? handle_mrc_cache: cached storage mismatch (-1/2899) (host) ssh 172.22.75.233 /var/cbmem.py| grep -A1 'time base' time base 2194240, total entries 3 1:79,373 2:765,726 1000:1,429,038 . reboot the target and repeat the commands once it comes up (host) ssh 172.22.75.233 /var/cbmem.py| grep -A1 'time base' time base 2124288, total entries 3 1:48,707 2:112,177 1000:754,652 (host) ssh 172.22.75.233 egrep "'(handle|prepare)_mrc'" /sys/firmware/log prepare_mrc_cache: at ffbff004, size b53 handle_mrc_cache: cached storage match Observe that during first startup u-boot detects the MRC cache mismatch (and presumably saves the new copy). During the second startup coreboot finds the saved MRC cache blob, and u-boot reports that the CBMEM and SPI instances are the same. Also, observe much lower timestamp values on the second run. Change-Id: I4ab11f9281a7eec777e98fe7a8fd1e0f6abfd859 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/9981 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-06tegra3: config: Tidy up tegra3-common.h to be closer to tegra2-common.hSimon Glass
Quite a few changes have been made in config since the tegra3 header was forked off in May. This brings this file back into line. BUG=chromium-os:21033 TEST=build and boot on seaboard Change-Id: I5244e03ca6a562f09b23bc9f0c11a5019084e399 Reviewed-on: http://gerrit.chromium.org/gerrit/8695 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-06tegra3: Add config file for waluigiSimon Glass
This adds a very basic config file which will boot to a serial prompt. BUG=chromium-os:21033 TEST=build and boot on seaboard Change-Id: I03082d05b9de19473dbe41ef6aff366a2ff044e8 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/8701
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