summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2020-01-07ddr: imx8m: Return error values from LPDDR4 trainingFrieder Schrempf
In cases when the same SPL should run on boards with i.MX8MM, that differ in DDR configuration, it is necessary to try different parameters and check if the training done by the firmware suceeds or not. Therefore we return the DDR training/initialization success to the upper layer in order to be able to retry with different settings if necessary. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2020-01-07pci: imx: Add iMX6SX compatibleMarek Vasut
The driver works fine with iMX6SX, add the missing compatible string. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-01-07video: lg4573: convert to DMHeiko Schocher
convert this driver to support DM. Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-04Revert "mmc: davinci: drop struct davinci_mmc_plat"Tom Rini
Adam Ford reports that this change breaks booting on da850-evm and Bartosz Golaszewski agrees that with the impending release we should revert the change for now. With that noted: This reverts commit 21a4d80a710c79053ac1deaa65ff9b69e6c031d4. Cc: Bartosz Golaszewski <brgl@bgdev.pl> Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-02video: add wrappers for ttf type files to .gitignoreDario Binacchi
The scripts/Makefile.lib generates an assembler file (*.S) to wrap the font data for each file of type ttf defined in Kconfig. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-01-02video: Avoid using #ifdef in video-uclass.cSimon Glass
This code does not really need to use #ifdef. We can use if() instead and gain build coverage without impacting code size. Change the #ifdefs to use IS_ENABLED(), etc., instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02video: Avoid using #ifdef in vidconsole-uclass.cSimon Glass
This code does not really need to use #ifdef. We can use if() instead and gain build coverage without impacting code size. Change the #ifdefs to use CONFIG_IS_ENABLED() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02video: Avoid using #ifdef in console_rotate.cSimon Glass
This code does not really need to use #ifdef. We can use if() instead and gain build coverage without impacting code size. Change the #ifdefs to use IS_ENABLED() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02video: Avoid using #ifdef in video blitting codeSimon Glass
This code does not really need to use #ifdef. We can use if() instead and gain build coverage without impacting code size. Change the #ifdefs to use IS_ENABLED() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02video: x86: Enable 32-bit graphics by defaultSimon Glass
Most x86 boards that use video make use of 32bpp graphics. Enable this by default. This fixes missing graphics output on some x86 boards. Also remove the unnecessary 'default n' while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-28Merge tag 'u-boot-imx-20191228' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.01 ----------------- - Fixes for Nitrogen6x - Fix corruption for mx51evk - colibri i.MX6: fix broken ESDHC conversion - mx6sxsabresd: fix broken mmcdev - imx6q_logic: cleanup boot sequence - update ATF for imx8mq_evk - pfuze: fix pmic_get() Travis CI: https://travis-ci.org/sbabic/u-boot-imx/builds/630007464
2019-12-27Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spiTom Rini
- rk spi transfer limit fix - Gigadevice, gd25q128 support - spi-nor-core warnings
2019-12-27rtc: rx8010js: add compatible stringRobert Beckett
Add compatible string used by Linux. Allows for simpler syncing of device trees. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2019-12-27rtc: s35392a: add compatible stringsRobert Beckett
Add compatible strings used by Linux. Allows for simpler syncing of device trees. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2019-12-27rtc: rx8010sj: fix DM initializationRobert Beckett
pass the udevice by reference instead of double ref Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2019-12-27spi: rk: Limit transfers to (64K - 1) bytesJagan Teki
The Rockchip SPI controller's length register only supports 16-bits, yielding a maximum length of 64KiB (the CTRLR1 register holds "length - 1"). Trying to transfer more than that (e.g., with a large SPI flash read) will cause the driver to hang. Now, it seems that while theoretically we should be able to program CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to cause the core to choke, so stick with a maximum of 64K - 1 bytes -- i.e., 0xffff. Note, that the size is further divided into 'minus 1' while writing into CTRLR1. This change fixed two different read issues, 1. sf read failure when with > 0x10000 2. Boot from SPI flash failed during spi_flash_read call in common/spl/spl_spi.c Observed and Tested in - Rockpro64 with Gigadevice flash - ROC-RK3399-PC with Winbond flash Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-27mtd: spi-nor-core: Fix static checker warningsVignesh Raghavendra
Static checker warns 'ret' variable may be used uninitialized in spi_nor_erase() and spi_nor_write() in case of zero length requests. Fix these warnings by checking for zero length requests and returning early. Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-12-27imx8m: ddr_init: Move ddr_init() messages to debug levelFabio Estevam
Currently inside ddr_init() there is a mix of printf() and debug() level messages. Since this type of information is useful for debug purposes, convert all of them to debug level for consistency. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-12-26phy: ti-pipe3: Fix SATA & USB PHY power up sequenceRoger Quadros
As per "Table 26-7. SATA PHY Subsystem Low-Level Programming Sequence" in TRM [1] we need to turn on SATA_PHY_TX before SATA_PHY_RX. [1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf Signed-off-by: Roger Quadros <rogerq@ti.com>
2019-12-26phy: ti-pipe3: improve DPLL stability for SATA & USBRoger Quadros
For increased DPLL stability use the settings recommended in the TRM [1] for PHY_RX registers for SATA and USB. For SATA we need to use spread spectrum settings even though we don't have spread spectrum enabled. The suggested non-spread spectrum settings don't work. [1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf Signed-off-by: Roger Quadros <rogerq@ti.com>
2019-12-26phy: ti-pipe3: Introduce mode property in driver dataRoger Quadros
Introduce a mode property in the driver data so that we don't have to keep using "of_device_is_compatible()" throughtout the driver. No functional change. Signed-off-by: Roger Quadros <rogerq@ti.com>
2019-12-26phy: ti-pipe3: Use TRM recommended settings for SATA DPLLRoger Quadros
The AM572x Technical Reference Manual, SPRUHZ6H, Revised November 2016 [1], shows recommended settings for the SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings. Use those settings in the driver. The TRM does not show a value for 20MHz SYS_CLK so we use something close to the 26MHz setting. [1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf Signed-off-by: Roger Quadros <rogerq@ti.com>
2019-12-22Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
- dwc3 and cdns3 bug fixes
2019-12-21usb: dwc3: Fix UTMI/UTMIW phy interface initializationJagan Teki
DWC3 support phy interfaces like 8/16-bit UTMI+. phy interface initialization code would handle them properly along with UNKNOWN type by default if none of the user/board doesn't need to use the phy interfaces at all. The current code is masking the 8/16-bit UTMI+ interface bits globally which indeed effect the UNKNOWN cases, therefore it effects the platforms which are not using phy interfaces at all. So, handle the phy masking bits accordingly on respective interface type cases. Fixes: 6b7ebff00190 ("usb: dwc3: Add phy interface for dwc3_uboot") Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-12-21usb: cdns3: ep0: Fix build warnings related to cache opsVignesh Raghavendra
Since, commit 62f9b6544728 ("common: Move older CPU functions to their own header") cache ops functions are declared in a separate header. Include the same to avoid build warnings. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-12-20drivers: net: bcm-sf2: pass -1 to phy_connect()Alex Marginean
Passing 0 to PHY connect used to trigger a MDIO scan due to a bug fixed in the meantime. It's unclear if bcm-sf2 wants to connect to PHY @ addr 0 or is scanning the bus, passing -1 here should keep it functional either way. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Cc: Jiandong Zheng <jdzheng@broadcom.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-20net: dwc_eth_qos: Pass -1 to phy_connect() to scan for all PHYsMarek Vasut
PHY address 0 is a valid PHY address, to scan for all PHYs, pass -1 to phy_connect(). Passing 0 used to work before be accident, but does no longer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-18mtd: spi-nor: ids: Add GigaDevice gd25q128Peter Robinson
Add gd25q128 128Mbit chip to spi-nor id table. Tested on Pinebook Pro Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-12-13sysreset_mpc83xx: fix mcp83xx -> mpc83xx typoRasmus Villemoes
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2019-12-11Merge tag 'fix-for-2020.01' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-i2c i2c bugfixes for 2020.01 - i2c: i2c_cdns: fix write timeout on fifo boundary fixes timout issue when writting number of bytes is multiple of the FIFO depth.
2019-12-11Merge tag 'u-boot-atmel-fixes-2020.01-a' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel - First set of u-boot-atmel fixes for 2020.01 cycle: This set includes a small fix for gpio bank names, one for removing unused headers (also touches some other boards), and a fix for the QSPI env read on one of the boards.
2019-12-11i2c: i2c_cdns: fix write timeout on fifo boundaryMichael Auchter
This fixes an issue that would cause I2C writes to timeout when the number of bytes is a multiple of the FIFO depth (i.e. 16 bytes). Within the transfer loop, after writing the data register with a new byte to transfer, if the transfer size equals the FIFO depth, the loop pauses until the INTERRUPT_COMP bit asserts to indicate data has been sent. This same check is performed after the loop as well to ensure data has been transferred prior to returning. In the case where the amount of data to be written is a multiple of the FIFO depth, the transfer loop would wait for the INTERRUPT_COMP bit to assert after writing the final byte, and then wait for this bit to assert once more. However, since the transfer has finished at this point, no new data has been written to the data register, and hence INTERRUPT_COMP will never assert. Fix this by only waiting for INTERRUPT_COMP in the transfer loop if there's still data to be written. Signed-off-by: Michael Auchter <michael.auchter@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-12-10Merge tag 'fixes-for-2020.01' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix crash and board reset when drawing RLE8 bitmaps bigger than the framebuffer resolution - reduce dead code in video and console uclass routines (tested on mx53cx9020, sama5d2_xplained, stm32mp157c-ev1, stm32f746-disco, stm32f769-disco and wandboard)
2019-12-09Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- Increase stack size to avoid a stack overflow during distro boot. - Add hifive-unleashed-a00.dts for SIFIVE FU540. - Add OF_SEPARATE support for SIFIVE FU540. - Add SPL support for Andes AX25 AE350. - Improve U-Boot SPL / OpenSBI smp boot flow for RISC-V.
2019-12-10spl: cache: Allow cache drivers in SPLRick Chen
When ax25-ae350 try to enable v5l2 cache driver in SPL configuration, it need this option for cache support in SPL. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Cc: Alan Kao <alankao@andestech.com>
2019-12-09Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-netTom Rini
2019-12-09net: ti: am65-cpsw-nuss: Add new compatible for J721eVignesh Raghavendra
Add new compatible to handle J721e SoC Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-09net: ti: am65-cpsw-nuss: Rework RX flow ID handlingVignesh Raghavendra
Get flow ID information for RX DMA channel using dma_get_cfg() interface instead of reading from DT. This is required in order to avoid DT update whenever there is change in the range of flow ID allocated to the host. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-09dma: ti: k3-udma: Implement dma_get_cfg() interfaceVignesh Raghavendra
Implement dma_get_cfg() interface to pass flow id information for DMA clients to use. This is needed because on K3 SoCs, CPSW (ethernet) and UDMA (DMA provider) support "flows" within a given RX DMA channel. This allows different network packets to be segregated while using same RX DMA channel. In order for basic ethernet to work, CPSW slave must be aware of the flow ID allocated for the RX channel by the DMA driver. This interface allows CPSW to query flow ID from DMA provider and configure it in CPSW HW. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-09dma: Introduce dma_get_cfg() interfaceVignesh Raghavendra
Sometimes, there would be a need to exchange data between DMA provider and DMA client which are very specific to DMA driver of the SoC/platform and are not generic enough to be put into struct dma. Therefore, introduce dma_get_cfg() interface to get DMA provider specific data from client device. Clients can use unique configuration ID flags to get different configuration data from DMA driver. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-09net: ftgmac100: align RX/TX descriptors on ARCH_DMA_MINALIGNCédric Le Goater
Fixes: e766849713ff ("net: ftgmac100: convert the RX/TX descriptor arrays") Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: fsl_enetc: register internal MDIO busAlex Marginean
This bus is used to access internal SoC PHYs. These PHYs are configured by the ENETC driver directly, but it's useful to have command line access to this MDIO to debug the system especially when using new external PHYs. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: fsl_enetc_mdio: return with time-out if HW is stuckAlex Marginean
On some boards MDIO may get stuck if it detects echo on the line. This is a know hardware issue, there is a board fix for it. In case we're running on a board that doesn't have the fix, we don't want to loop here forever and freeze U-Boot. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: fsl_enetc: move PCS and PHY config to probeAlex Marginean
This reduces the time needed to establish a link as we don't reset the link each time the interface is used. Our Link capabilities do not change at run-time so there is no need to re-apply PHY configuration each time. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: fsl_enetc: Add 2.5Gbps to supported link speedsAlex Marginean
The original code enabled link speeds up to 1Gbps, but the interface can go up to 2.5G, enable that speed to in PHY AN mask. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: fsl_enetc: use the new MDIO DM helper functionsAlex Marginean
Uses the new dm_eth_phy_connect helper to connect to the PHY to simplify the code. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: fsl_enetc: use XFI, USXGMII interface type macrosAlex Marginean
Apply 10G PCS init for USXGMII, XFI interface types. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: aquantia: check system interface too when checking for link upAlex Marginean
In some cases the link on the system interface of the aquantia PHY comes up after the link on line interface. The link state loop only checks the line side, which may result in first packet sent being lost. Use aquantia_link_is_up instead, which checks both system and line side on gen 2/3 PHYs to avoid losing the 1st packet. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: aquantia: set SMBus addr based on DT propertyAlex Marginean
Aquantia PHYs have a SMBus interface mostly used for debug. The addresses on this interface are normally set up by PHY firmware, but depending on the board they may end up not being unique. Add an optional DT property used to change SMBus address if needed. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09drivers: net: aquantia: set MDI reversal based on DT propertyAlex Marginean
MDI pins up to the RJ45 connector may be reversed on the board and the default PHY configuration applied by firmware may or may not match that. Add an optional DT property to configure MDI reversal for this case. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-30 19:02:54 +0000