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Signed-off-by: Wolfgang Denk <wd@denx.de>
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because PowerPC 405 can use UartLite as console
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Improve indentation in drivers/at45.c
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Signed-off-by: David Saada <david.saada@ecitele.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
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[PATCH 2/3] OneNAND support (take #2)
OneNAND support at U-Boot
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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[PATCH 1/3] OneNAND support (take #2)
OneNAND support at U-Boot
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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Fixup for the break statement in wrong place.
[Patch by urwithsughosh@gmail.com]
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Fix usage of do_div() in nand erase|read|write process output.
The last patch to nand_util.c introduced do_div() instead of libgcc's
implementation. But do_div() returns the quotient in its first
macro parameter and not as result.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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This patch add support for the Trizeps IV module (520Mhz).
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Jason Jin <Jason.jin@freescale.com>
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o add drivers/sil680.c to support the Sil680 IDE-controller.
o drivers/Makefile: add sil680.o.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
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The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
set to non-zero, because it doesn't support MRM (memory-read-
multiple) correctly. We now added the possibility to configure
this register in the board config file, so that the default value
of 8 can be overridden.
Here the details of this patch:
o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
board-specific settings. As an example the sequoia board requires 0.
Idea from Stefan Roese <sr@denx.de>.
o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
CFG_PCI_CACHE_LINE_SIZE to 0.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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This reverts commit 9468e680.
Commit 16e23c3f5da removing allocation of PCSRBAR is sufficient.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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<ed.swarthout@freescale.com>
The problem is pciauto_setup_device() getting called from fsl_pci_init.c
is allocating memory space it doesn't need.
Signed-off-by: Ed Swarthout <ed.swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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The logic to check if there is a correct MAC address in the DM9000
EEPROM, added in the last patch, is wrong. Now the MAC address is
always taken from the environment, even if a suitable MAC is present
in the EEPROM.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Fix the following warnings:
- usb.c:xx: warning: function declaration isn't a prototype
- usb_ohci.c:xxx: warning: passing argument 1 of '__fswab32' makes integer
from pointer wihtout a cast
Signed-off-by: Martin Krause <martin.krase@tqs.de>
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CPU physical address space was being wasted by allocating a
PCSRBAR PCI inbound region to it's memory space.
As a rule, PCSRBAR should be left alone since it does not affect
transactions from self and other masters may have changed it.
Signed-off-by: Ed Swarthout <ed.swarthout@freescale.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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This patch has been sent on:
- 6 Jun 2007
Many users of PCI config read routines tend to ignore the function
ret value, and are only concerned about the contents of *val. Based
on this, pci_hose_read_config_{byte,word}_via_dword should initialize
the *val on dword read error.
Without this fix, for example, we'll go on scanning bus with vendor or
header_type uninitialized. This brings many unnecessary config trials.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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The TSEC driver's PHY code waits a long time for autonegotiation to
complete, even if the link is down. The PHY knows the link is
down or up before autonegotiation completes, so we can short-circuit
the process if the link is down.
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Actually, fixed a large bug in the UEC for *all* platforms.
How did this ever work?
uec_init() did not follow the spec for eth_init(), and returned
0 on success. Switch it to return the link like tsec_init()
(and 0 on error)
The immap for the 8568 was defined based on MPC8568, rather than
CONFIG_MPC8568
CONFIG_QE was off
CONFIG_ETHPRIME was set to "Freescale GETH". Now is "FSL UEC0"
Fixed a comment about the ranges for CONFIG_ETHPRIME if TSEC_ENET is
enabled
Signed-off-by: Andy Fleming <afleming@freescale.com>
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The tsec_info structure and array has a "flags" field for each
ethernet controller. This field is the only reason there are
settings. Switch to defining TSECn_FLAGS for each controller
in the config header, and we can greatly simplify the array, and
also simplify the addition of future boards.
Signed-off-by: Andy Fleming <afleming@freescale.com>
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microblaze CPU have problem with bios_emulator code.
Microblaze toolchain doesn't support PRAGMA PACK.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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microblaze toolchain don't support PRAGMA PACK.
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Typically this causes scsi init to corrupt the
devlist and break the coninfo command.
Fix a compiler size warning.
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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