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path: root/drivers/spi/cadence_qspi_apb.c
AgeCommit message (Expand)Author
2018-01-24spi: cadence_qspi_apb: Make flash writes 32 bit alignedVignesh R
2018-01-24Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when pos...Vignesh R
2018-01-24Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when poss...Goldschmidt Simon
2018-01-24spi: cadence_spi: Sync DT bindings with LinuxJason Rush
2018-01-24wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas
2017-01-04spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possibleVignesh R
2017-01-04spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possibleVignesh R
2016-12-15spi: cadence_qspi: Fix CS timingsPhil Edworthy
2016-12-15spi: cadence_qspi: Remove returns from end of void functionsPhil Edworthy
2016-12-15spi: cadence_qspi: Use spi mode at the point it is neededPhil Edworthy
2016-12-15spi: cadence_qspi: Clean up the #define namesPhil Edworthy
2016-12-15spi: cadence_qspi: Use #define for bits instead of bit shiftsPhil Edworthy
2016-12-15spi: cadence_qspi: Better debug information on the SPI clock ratePhil Edworthy
2016-12-15spi: cadence_qspi: Fix baud rate calculationPhil Edworthy
2016-12-15spi: cadence_qspi: Fix clearing of pol/pha bitsPhil Edworthy
2016-09-23treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada
2016-08-07spi: cadence_qspi_apb: Ensure baudrate doesn't exceed max valueChin Liang See
2016-07-09spi: cadence_quadspi: Enable QUAD mode based on DT dataVignesh R
2016-07-09spi: cadence_qspi_apb: Support 32 bit AHB addressVignesh R
2016-05-06mtd: cqspi: Simplify indirect read codeMarek Vasut
2016-05-06mtd: cqspi: Simplify indirect write codeMarek Vasut
2015-10-27spi: cadence_qspi_apb: Use BIT macroJagan Teki
2015-07-03spi: cadence_qspi: support FIFO width other than 4 bytesVikas Manocha
2015-07-03spi: cadence_qspi: get sram size from device treeVikas Manocha
2015-07-03spi: cadence_qspi: move the sram partition in initVikas Manocha
2014-12-06spi: Add Cadence QSPI DM driver used by SoCFPGAStefan Roese