summaryrefslogtreecommitdiff
path: root/drivers/net
AgeCommit message (Collapse)Author
2018-01-27net: sh_eth: Separate out MAC address programmingMarek Vasut
Pull out the code for writing MAC address into the NIC into a separate function, so it can be reused by both DM and non-DM code. This is done in preparation for DM support, which handles MAC address programming separately. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: sh_eth: Split sh_eth_recvMarek Vasut
Split sh_eth_recv into two functions, one which checks whether a packet was received and one which handles the received packet. This is done in preparation for DM support, which handles these two parts separately. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: sh_eth: Pass sh_eth_dev aroundMarek Vasut
Pass sh_eth_dev structure around instead of eth_device, since the later is specific to the legacy networking support. This change is done in preparation for the DM addition. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: sh_eth: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2Marek Vasut
Use the common RCAR_GEN2 config option instead of enumerating each SoC and having a lengthy ifdef clause. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: ravb: staticize ravb_startMarek Vasut
Cosmetic fix, make ravb_start() static. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-26Merge git://git.denx.de/u-boot-spiTom Rini
2018-01-24wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas
wait_for_bit callers use the 32 bit LE version Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-15phy: atheros: set auto-negotiation for AR8021Zhao Qiang
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Add to Kconfig and convertNobuhiro Iwamatsu
This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Fix misaligned cache operation warningNobuhiro Iwamatsu
When we using network on board using sh-eth, it prints a lot of "CACHE: Misaligned operation at range" messages. This commit fixes this problem. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Change read/write() param to struct sh_eth_infoNobuhiro Iwamatsu
This changes Change structure used in sh_eth_read and sh_eth_write function from struct sh_eth_dev to struct sh_eth_info. This is necessary to convert to Driver Model. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Remove bd_t from sh_eth_config()Nobuhiro Iwamatsu
bd_t is not used in sh_eth_config(). This deletes bd_t from sh_eth_config() Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: Fix coding style checked by checkpatch.plNobuhiro Iwamatsu
This fixes the chord style checked by checkpatch.pl. Details of change details are as follows: - Fix typo Change from alligned to aligned. - Remove whitespace before ',' - Add spaces preferred around that '|' - Fix missing a blank line after declarations - Remove space after a cast declaration - Fix format of block comments - Add a blank line after function/struct/union/enum declarations Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: phy: b53: Add b53_reg read/write commandsFlorian Fainelli
Add a b53_reg read/write command which allows inspecting the switch registers. Because the Broadcom BCM53xx registers have different sizes, we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain expected results. Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15net: designware: Pad small packetsFlorian Fainelli
Make sure that we pad small packets to a minimum length of 60 bytes (without FCS). This is necessary to interface with Ethernet switches that will reject RUNT frames unless padded correctly. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15net: phy: Add Broadcom BCM53xx switch driverFlorian Fainelli
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar to the Marvell MV88E617x. This takes care of configuring the minimum amount out of the switch hardware such that each user visible port (configurable) and the CPU port can forward packets between each other while preserving isolation with other ports. This is useful for e.g: the Lamobo R1 board featuring a Broadcom BCM53125 switch. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15net: designware: add clock supportPatrice Chotard
This implementation manages several clocks, disable and free all of them in case of error during probe and in remove callback. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: mvneta - Fixed recv() when multiple packets have arrived.Jason Brown
This patch fixes a problem in the mvneta driver where if more than one packet arrives between calls to mvneta_recv(), the additional descriptors will be marked as free even though only one descriptor has been read and processed from the receive queue. This causes the additional packet(s) to be delayed until the next packet arrives. >From this point on all packets will be delayed because the receive queue will contain unprocessed packets but the hardware shows no busy descriptors. Signed-off-by: Jason Brown <jason.brown@apcon.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: miiphybb: fix casting errorChris Brandt
Since the return value is a signed int, if the leading MSB of rdreg is a 1, it will get signed extended and will return a negative value which is an error even though we read the correct value. Fixes: dfcc496ed7e2 ("net: mii: Changes not made by spatch") Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: remove sh_eth_offset_rz tableChris Brandt
First, this table could never be included in the build anyway because SH_ETH_TYPE_RZ is not defined until later in the file. Second, the register PIR was missing, so PHY MDIO never worked. Third, after adding the PIR register, the table is EXACTLY the same as sh_eth_offset_gigabit, so there is no value to it. Therefore, just delete it use the gigabit one. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: sh-eth: fix inl and outl definitionsChris Brandt
The macros inl and outl maybe already be defined from file arch/arm/include/asm/io.h so there may be no reason to define them. And if you do try defined them here, you get a redefined complier warning. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: phy: marvell: Add functions to read PHY's extended registersLukasz Majewski
This commit allows extended Marvell registers to be read with: foo > mdio rx FEC 3.10 Reading from bus FEC PHY at address 0: 3.16 - 0x1063 foo > mdio wx FEC 3.10 0x1011 The above code changes the way ETH connector LEDs blink. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: York Sun <york.sun@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: Fix buffer overrun error in netconsoleJoe Hershberger
Need to not access the byte after the input_buffer. Reported-by: Coverity (CID: 144423) Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15net: macb: Add support for Xilinx Zynq SoCWilson Lee
Although Xilinx Zynq SoC was using MACB similar hardware. However, U-boot MACB driver was not supporting Xilinx Zynq SoC. This patch is to add support for the Xilinx Zynq SoC to the existing MACB network driver. This patch is to add Zynq GEM DMA Config, provide callback function for different linkspeed for case of using Xilinx Zynq Programmable Logic as GMII to RGMII converter. This patch convert the return value to use error codes. Signed-off-by: Wilson Lee <wilson.lee@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com> Cc: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-11Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-01-10configs: Move SYS_DPAA_QBMAN to KconfigAhmed Mansour
The CONFIG_SYS_DPAA_QBMAN define is used by DPAA1 freescale SOCs to add device tree fixups that allow deep sleep in Linux. The define was placed in header files included by a number of boards, but was not explicitly documented in any of the Kconfigs. A description was added to the drivers/networking menuconfig and default selection for current SOCs that have this part Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-09ARM: mvebu: Allow MVNETA to be selected with Armada 3700 SoCsMiquel Raynal
Until now, Armada 3700 SoCs could not enable the mvneta driver, and thus did not benefit from Ethernet support. Add ARMADA_3700 in the "depends on" list of the MVNETA Kconfig entry. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-12-19Merge git://git.denx.de/u-boot-sunxiTom Rini
2017-12-18Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-12-18net: phy: meson-gxl: detect LPA corruptionJerome Brunet
This patch is ported from the Linux patch posted at [1] and applied to net tree as commit f1e2400a80ff. The purpose of this change is to fix the incorrect detection of the link partner (LP) advertised capabilities which sometimes happens with this PHY (roughly 1 time in a dozen) This issue may cause the link to be negotiated at 10Mbps/Full or 10Mbps/Half when 100MBps/Full is actually possible. In some case, the link is even completely broken and no communication is possible. To detect the corruption, we must look for a magic undocumented bit in the WOL bank (hint given by the SoC vendor kernel) but this is not enough to cover all cases. We also have to look at the LPA ack. If the LP supports Aneg but did not ack our base code when aneg is completed, we assume something went wrong. The detection of a corrupted LPA triggers a restart of the aneg process. This solves the problem but may take up to 6 retries to complete. [1] https://lkml.kernel.org/r/20171208110811.30789-1-jbrunet@baylibre.com Fixes: 8995a96d1d67 ("net: phy: Add Amlogic Meson GXL Internal PHY support") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-13armv8: ls1043a/ls2080a: check SoC by device IDWenbin song
Check LS1043A/LS2080a by device ID without using personality ID to determine revision number. This check applies to all various personalities of the same SoC family. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-09net: ravb: Add R8A77995 D3 compatibleMarek Vasut
Add new compatible to the Ethernet AVB driver for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09net: ravb: Add R8A77970 V3M compatibleMarek Vasut
Add new compatible to the Ethernet AVB driver for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-07sunxi: Fix A20-OLinuXino-MICRO LAN8710 supportStefan Mavrodiev
>From revision J the board uses new phy chip LAN8710. Compared with RTL8201, RA17 pin is TXERR. It has pullup which causes phy not to work. To fix this PA17 is muxed with GMAC function. This makes the pin output-low. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-12-06driver: fsl-mc: MC object cleanup when DPL not loadedYogesh Gaur
For case when MC is loaded but DPL is not deployed perform MC object [DPBP, DPIO, DPNI and DPRC] cleanup. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06driver: net: fsl-mc: flib changes for MC 10.3.0Yogesh Gaur
Existing MC driver framework is based on MC-9.x.x flib. This patch migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib which is MC-10.3.0. Changes introduced due to migration: 1. To get OBJ token, pair of create and open API replaces create APIs 2. Pair of close and destroy APIs replaces destroy APIs 3. For version read, get_version APIs replaces get_attributes APIs 4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs 5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct 6. Single API dpni_get_buffer_layout/set_buffer_layout replaces dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs. New API takes a queue type as an argument. 7. Similarly dpni_get_queue/set_queue replaces dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related APIs Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-30net: ravb: Fix reset GPIO handlingMarek Vasut
Fix handling of the reset GPIO. Drop the _nodev() suffix from the gpio_request_by_name() call as there is now a proper DM capable GPIO driver. Also check if the GPIO is valid before freeing it in remove path, otherwise U-Boot will crash. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-29net: xilinx_axi_emac: Use readl and writel for io opsSiva Durga Prasad Paladugu
This patch uses readl and writel instead of in_be32 and out_be32 for io ops as these internally uses readl, writel for microblaze and for Zynq, ZynqMP there is no need of endianness conversion and readl, writel should work straightaway. This patch starts supporting the driver for Zynq and ZynqMP platforms. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29net: zynq_gem: Dont enable SGMII and PCS selectionSiva Durga Prasad Paladugu
Dont enable SGMII and PCS selection if internal PCS/PMA is not used, by getting the info about internal/external PCS/PMA usage from dt property "is-internal-phy". Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29net: xilinx_axi_emac: Add support for non processor modeSiva Durga Prasad Paladugu
Add support for non processor mode, this mode doesn't have access to some of the registers and hence this patch bypasses it and also length has to be calculated from status instead of app4 in this mode. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2017-11-28net: xilinx_axi_emac: Read dma address using fdtdec_get_addrSiva Durga Prasad Paladugu
Read dma address using fdtdec_get_addr as it checks for address cells and size cells and reads the address properly. fdtdec_get_int always assume address is of int size which goes wrong if using it on 64-bit architecture. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28net: xilinx_axi_emac: Use wait_for_bit instead of while loopSiva Durga Prasad Paladugu
Use wait_for_bit instead while loop during init Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2017-11-17net: phy: Add Amlogic Meson GXL Internal PHY supportNeil Armstrong
The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY. The PHY acts as a generic PHY but needs a slight configuration right before it's configuration. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-11-15driver: net: fsl-mc: Use base 16 in simple_strtoulPrabhakar Kushwaha
Value provided in MC_MEM_SIZE_ENV_VAR is in hex. Use 16 as base in simple_strtoul. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-14drivers: net: ldpaa_eth: Correct error handler for qbman_swp_acquire()Ashish Kumar
The zero value returned from qbman_swp_acquire() is an error condition meaning no free buffer for allocation. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kushwaha Prabhakar <prabhakar@freescale.com> [YS: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-10net: sun8i_emac: Fix build for non-H3/H5 SoCsChen-Yu Tsai
Only the H3/H5 SoCs have an internal PHY and its related clock and reset controls. Use an #ifdef to guard the internal PHY control code block so it can be built for other SoCs, such as the A83T or A64. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-09sunxi: restore PHYLIB for CONFIG_SUN4I_EMAC usersArtturi Alm
due misnaming of CONFIG_SUN4I_EMAC in include/configs/sunxi-common.h, likely missed in: commit 3146f0c017df ("Move PHYLIB to Kconfig") Signed-off-by: Artturi Alm <artturi.alm@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-09sunxi: fix CONFIG_SUNXI_EMAC referencesArtturi Alm
fixes CONFIG_SUNXI_EMAC references from drivers/net/Makefile and include/configs/sunxi-common.h likely forgotten in: commit abc3e4df59f5 ("sunxi: Convert SUNXI_EMAC to Kconfig") Signed-off-by: Artturi Alm <artturi.alm@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-10-30net: fec_mxc: Change "error frame" message to debug levelFabio Estevam
As reported by Jonathan Gray: "After the recent changes to add SimpleNetworkProtocol to efi_loader when booting off mmc via an efi payload that doesn't use SimpleNetworkProtocol U-Boot's fec_mxc driver will now display various "error frame" messages. .... MMC Device 1 not found MMC Device 2 not found MMC Device 3 not found Scanning disks on sata... Found 6 disks reading efi/boot/bootarm.efi 67372 bytes read in 32 ms (2 MiB/s) ## Starting EFI application at 12000000 ... >> OpenBSD/armv7 BOOTARM 1.0 error frame: 0x8f57ec40 0x00003d74 error frame: 0x8f57ec40 0x00007079 error frame: 0x8f57ec40 0x00006964 error frame: 0x8f57ec40 0x00006f6f error frame: 0x8f57ec40 0x0000726f error frame: 0x8f57ec40 0x00002074 error frame: 0x8f57ec40 0x00006f6f" Heinrich Schuchardt explains: "A receive FIFO overrun can be expected if network packages are not processed. With the network patches we check if a package is available quite often." Move the "error frame" messages to debug level so that a clean output log can be seen. Reported-by: Jonathan Gray <jsg@jsg.id.au> Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-10-27armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_IDAshish Kumar
Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID PHY_INTERFACE_MODE_RGMII_TXID. These change where introduced in phy driver in commit 05b29aa0cb68 ("net: phy: realtek: fix enabling of the TX-delay for RTL8211F"). Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-03 04:27:15 +0000