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path: root/drivers/net
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2020-05-15rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOODTrevor Woerner
Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5XTrevor Woerner
Have this symbol follow the pattern of all other such symbols. This patch removes a TODO from the code. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-12net: bcmgenet: Don't set ID_MODE_DIS when not using RGMIINicolas Saenz Julienne
As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is RGMII. Don't enable it for the rest of setups. This has been seen to misconfigure RPi4's PHY when booting Linux. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-11Merge tag 'ti-v2020.07-rc2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix boot issues on Nokia RX-51 - Configure AM6 CPSW for 10Mbps in rgmii mode. - Minor changes for J721e
2020-05-10eQos: Implement the read_rom_hwaddr callbackYe Li
Implement the read_rom_hwaddr callback to load MAC address from fuse for imx8m platforms. Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10fec: Move imx_get_mac_from_fuse declare to imx fileYe Li
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp, we have two different ENET controllers and both need to call this function. So decouple its declare from fec driver. Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: eqos: implement callbaks to get interface and set txclk rateFugang Duan
Implement the callbacks to get phy mode interface and txclk rate configuration. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: dwc_eth_qos: add dwc eqos for imx supportFugang Duan
Add dwc eqos for imx support. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: phy: realtek: add rx delay support for RTL8211FFugang Duan
Add RX delay enable support for RTL8211F PHY. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: Update eQos driver and FEC driver to use eth phy interfacesYe Li
Update eQoS and fec ethernet drivers to support shared MDIO framework Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: Add eth phy generic driver for shared MDIOYe Li
For dual ethernet controllers, the HW design may connect ETH phys to one MDIO ports. So two different ethernet drivers have to share MDIO bus. Since two ethernet drivers are independent, we can't ensure their probe order. To resolve this problem, introduce an eth phy generic driver and uclass. After eth-uclass binds, we search the mdio node and binds the phy node with the eth-phy-generic driver. When one eth driver get its phy device, the parent of phy device will probe prior than phy device. So this ensure the eth driver ownes the MDIO bus will be probed before using its MDIO. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: fec: add fuse checkPeng Fan
Add fuse check for fec. If the fuse indicates the module will not work in the SoC, let's fail the initialization. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-09net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii modeMurali Karicheri
In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is configured for External Control ("in band") mode CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1 Hence update am65_cpsw_update_link() to follow documentation. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-05-07phy: atheros: consolidate {ar8031|ar8035}_config()Michael Walle
The two functions are now exactly the same, remove one of them. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: ar8035: remove static clock configMichael Walle
We can configure the clock output in the device tree. Disable the hardcoded one in here. This is highly board-specific and should have never been enabled in the PHY driver. If bisecting shows that this commit breaks your board it probably depends on the clock output of your Atheros AR8035 PHY. Please have a look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set "clk-out-frequency = <125000000>" because that value was the hardcoded value until this commit. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: add device tree bindings and configMichael Walle
Add support for configuring the CLK_25M pin as well as the RGMII I/O voltage by the device tree. By default the AT803x PHYs outputs the 25MHz clock of the XTAL input. But this output can also be changed by software to other frequencies. This commit introduces a generic way to configure this output. Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V. An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V option needs an external supply voltage. This commit adds support to switch the internal LDO to 1.8V. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: move delay config to common functionMichael Walle
Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: introduce debug read and write functionsMichael Walle
Provide functions to read and write the Atheros debug registers. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: use defines for PHY IDsMichael Walle
Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: fix AR8021 PHY ID maskMichael Walle
The upper bits are all the OUI. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: Clarify the intention of ar8021_configVladimir Oltean
Debug register 5 contains TX_CLK DELAY at bit 8 and reserved values at the other bit positions, just like the other PHYs in the family do. Therefore, it is not necessary to hardcode the reserved values, but instead simply follow the read-modify-write procedure from the common function. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: Explicitly disable RGMII delaysVladimir Oltean
To eliminate any doubts about the out-of-reset value of the PHY, that the driver previously relied on. If bisecting shows that this commit breaks your board you probably have a wrong PHY interface mode. You probably want the PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: Clarify the configuration of the CLK_25M output pinVladimir Oltean
Also take the opportunity to use the phy_read_mmd and phy_write_mmd convenience functions. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: Use common functions for RGMII internal delaysVladimir Oltean
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07phy: atheros: Make RGMII Tx delays actually configurable for AR8035Vladimir Oltean
Delete the extraneous write to debug reg 5 that enables Tx delay When the driver was originally introduced in commit "6027384a phylib: Add Atheros AR8035 GETH PHY support", the Tx delay was being unconditionally enabled. Then during "2ec4d10b phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXID", the author did not notice that code for enabling Tx delay code was already. Therefore, the if condition for Tx delay has always been useless for this PHY since this commit introduced it. Prior to this patch, every AR8035 PHY in U-boot had Tx delay enabled. After this patch, only those who define the interface as RGMII_TXID or RGMII_ID will. This is to be expected, but will nonetheless break the setups of those who didn't know they rely on Tx delay implicitly. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-04Merge tag 'u-boot-imx-20200502' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.07 ---------------- - imxrt: fix LCD clock, fix doc - new board: Coral Dev - imx8: enable Cache in SPL. SNVS, update SCFW API - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading - MX6ULL : is_imx6ull to include i.MX6ULZ - Net: add config to enable TXC delay Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
2020-05-04net: pcnet: fix I/O primitives for memory accessDaniel Schwierzeck
Commit 69529c912059 ("net: pcnet: Switch to PCI memory access") switched from PCI IO access to PCI memory access without updating the I/O primitives. Contrary to SH, the primitives for memory access and IO access are implemented differently. Thus doing memory access with IO port primitives breaks the driver on MIPS Malta board. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-05-01net: smc911x: Add DM supportMarek Vasut
Add support for U-Boot DM and DT probing. Furthermore, build the SMC911x standalone EEPROM example only for the non-DM case, as it is not converted yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: fec: Add possibility to enable TXC delayPhilippe Schenker
This patch enables the possibility to set FEC_ENET_ENABLE_TXC_DELAY or FEC_ENET_ENABLE_RXC_DELAY so one can via a define enable the RXC or TXC delay in the MAC. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-05-01net: phy: micrel: Add basic support for KSZ9131Philippe Schenker
This adds basic support for the new Micrel KSZ9131 phy. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01net: phy: micrel: Use defines for PHY_IDs and MASKPhilippe Schenker
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01net: smc911x: Split non-DM specific bits from common codeMarek Vasut
Split network handling functions into non-DM specific parts and common code in preparation for conversion to DM. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: smc911x: Clean up the status handling in smc911x_recv()Marek Vasut
Invert the status handling logic in smc911x_recv(), to make the function easier to read, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Pass around driver private dataMarek Vasut
Introduce a private data structure for this driver with embedded struct eth_device and pass it around. This prepares the driver to work with both DM and non-DM systems. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Convert IO accessors to {read,write}{w,l}()Marek Vasut
Convert the IO accessors to standard ones instead of using volatile void pointers, as those do not cover all the bus access details. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Drop weak alias from 32bit accessorsMarek Vasut
These accessors are not overridden by any board, and even if they were, this is something which should be handled via DM now, so remove the weak alias option. Moreover, drop the inline keyword, as the compiler can decide better. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Inline all functions from header fileMarek Vasut
Inline all the functions from the header file, as they are not used outside of the driver or the standalone EEPROM example. Note that this does introduce considerable amount of duplication in the standalone EEPROM example, however that one has to be rewritten anyway, roughly such that the SMC911x driver would expose DM EEPROM interface and the standalone example would use that. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Pull MII registration into separate functionMarek Vasut
Pull the MII interface registration into separate function to avoid the ifdeffery in smc911x_initialize(). Moreover, adjust the fail path such that we use goto labels. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Fix potential memleak() in init fail pathMarek Vasut
Fix memleak in the init fail path, where if allocation or registration of MDIO bus fails, then ethernet interface is not unregistered and the private data are not freed, yet the probe function reports a failure. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Invert the logic in smc911x_miiphy_{read,write}()Marek Vasut
Invert the logic in the aforementioned functions to reduce indent, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Rename smc911x_rx() to smc911x_recv()Marek Vasut
Rename the function to keep the naming scheme consistent, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Replace malloc()+memset() with calloc()Marek Vasut
Replace combination of malloc()+memset() with calloc() as the behavior is exactly the same and the amount of code is reduced. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: smc911x: Remove pkt_data_{push,pull}Marek Vasut
These functions are never used and are likely a pre-DM remnant from times long past, just remove them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01net: rtl8139: Fill in SPDX tagMarek Vasut
The rtl8139 driver is derived from Etherboot driver, which is in turn derived from Linux 8139too driver added in Linux 2.2.18pre14. An undocumented change in Linux 2.4.10.2 added a new field to the driver, MODULE_LICENSE("GPL"); . According to current Linux kernel licensing rules, Documentation/process/license-rules.rst, quote: "GPL" Module is licensed under GPL version 2. This does not express any distinction between GPL-2.0-only or GPL-2.0-or-later. The exact license information can only be determined via the license information in the corresponding source files. And since the code does not contain any "future" clause, the tag is therefore GPL-2.0 only. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Move functions aroundMarek Vasut
Just move functions around in preparation for easy DM conversion, rename rtl_bcast_addr() to rtl8139_bcast_addr(), no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Finish cleanupMarek Vasut
Finish the checkpatch cleanup of the driver, fix the remaining issues in probe and init function and in global variables, rename the probe function to rtl8139_init(), no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Factor out hardware resetMarek Vasut
This hardware reset and reset-wait implementation was twice in the driver, factor it out into a separate function. This really should use wait_for_bit() eventually and return -ETIMEDOUT, but thus far, handling of any of this is missing from the driver. This must be added later. Thus far, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of rtl_disable()Marek Vasut
Rename the function to rtl8139_stop(), clean up checkpatch errors in the stop polling function. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of rtl_poll()Marek Vasut
Rename the function to rtl8139_recv(), clean up various checkpatch errors, line-over-80 conditions, and malformed comments. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01net: rtl8139: Minor cleanup of rtl_transmit()Marek Vasut
Rename the function to rtl8139_send(), clean up the TX polling, the TX OK condition at the end, overuse of typecasts, and various line-over-80 problems. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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