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Cardhu boards can use Atmel and Winbond SPI flash
parts - support both in one binary.
BUG=chromium-os:23496
TEST=build all OK, test on Cardhu.
'sf probe 0' returns:
SF: Detected AT25DF321A with page size 256, total 4 MiB.
sf read/write/erase all work OK.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Change-Id: I7df3abb030a49b572e1172ca77227cd4d63e0c21
Reviewed-on: https://gerrit.chromium.org/gerrit/18539
Reviewed-by: Mike Frysinger <vapier@chromium.org>
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The Winbond W25X40 is now being used in the IP02 (and possibly IP04).
Tested and working on the actual device.
(cherry picked from commit ad8e3bd65766f670007bc5ae7c19b64e69e3dceb)
Change-Id: I0e395dc6c10086a330d2a32e8f7601afe1a1792d
Reviewed-on: https://gerrit.chromium.org/gerrit/11864
Reviewed-by: Taylor Hutt <thutt@chromium.org>
Tested-by: Taylor Hutt <thutt@chromium.org>
Commit-Ready: Simon Glass <sjg@chromium.org>
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There is no need to multiply the length of the area in bytes by the
erase sector size.
BUG=none
TEST=manual
. when debug messages are enabled, the sensible erase size value is
printed.
Change-Id: I12373419fc1c136fac45869336487de5eedc441b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://gerrit.chromium.org/gerrit/9965
Reviewed-by: Gabe Black (Do Not Use) <gabeblack@google.com>
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This CL is a Winbond SPI flash specific modification following
the same pattern as the earlier Macronix SPI flash specific fix
(http://gerrit.chromium.org/gerrit/7522).
BUG=chromium-os:20105
TEST=manual
. build a Newton bootloader image
. program the image on a Newton device
. restart the device
. at the 'boot>' prompt run the following commands:
setenv xyz 'this is a string'
saveenv
. reboot the device
. at the 'boot>' prompt run 'printenv'
Observe the environment include the new variable.
Change-Id: Ic82751ba8adc4ce8576141899afa989a60249003
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://gerrit.chromium.org/gerrit/7729
Reviewed-by: Stefan Reinauer <reinauer@google.com>
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There is a problem with x86 systems using Intel ICH chips as the
SPI controller: whereas the SPI chips allow for 256 byte pages
for write transactions, the controllers allow for only 64 bytes
per transaction. This causes failures when the chip driver
invokes the controller driver write() function passing a 256 byte
page: only 64 bytes get written.
This problem is not easy to fix in u-boot, this change suggests a
scheme to allow the size override for certain SPI controllers.
BUG=chromium-os:20105
TEST=manual
. this change was tested combined with other modification, the
ability to read and save the 16KB environment in a maconix SPI
flash was demonstrated.
Change-Id: Ic42f294da0e6abd554107d6189cabd7269370b96
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://gerrit.chromium.org/gerrit/7522
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
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This change reduces the erase unit size to 4K from 64K, which
allows for more efficient use of the Macronix SPI flash.
BUG=chromium-os:20105
TEST=manual
. this change was tested combined with other modification, the
ability to read and save the 16KB environment in a Macronix SPI
flash was demonstrated.
Change-Id: Icb723673079d755ffd9d89ac8d1286592722aa52
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://gerrit.chromium.org/gerrit/7533
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
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The correct size format specification for size_t is 'z'.
BUG-=none
TEST=manual
compile with and without DEBUG defined, observe success.
Change-Id: I036500751f0cc271eb0fd5623d61fd05a81013f9
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://gerrit.chromium.org/gerrit/7523
Reviewed-by: Mike Frysinger <vapier@chromium.org>
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Make the Winbond flash chip driver support the CONFIG_SPI_FLASH_NO_FAST_READ
option so that it can be used with the ICH SPI controller.
BUG=chrome-os-partner:5829
TEST=With this and other changes, built and vbooted x86-alex and stumpy.
Signed-off-by: Gabe Black <gabeblack@google.com>
Change-Id: I8113b0476818fab1515ce37bd8bba9004d0717ca
Reviewed-on: http://gerrit.chromium.org/gerrit/7161
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Gabe Black (Do Not Use) <gabeblack@google.com>
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The CONFIG_SPI_FLASH_MACRONIX_NO_FAST_READ currently only applies to the
Macronix flash chip driver as the name suggests. This same option, however,
could be renamed something more generic and reused in other drivers. This
change does that by dropping MACRONIX from the option.
TEST=With this and other changes, built and vbooted on x86-alex, stumpy.
BUG=chrome-os-partner:5829
Signed-off-by: Gabe Black <gabeblack@google.com>
Change-Id: I5878877025baba44b09bce9507b528ba243d132b
Reviewed-on: http://gerrit.chromium.org/gerrit/7160
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Gabe Black (Do Not Use) <gabeblack@google.com>
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The newer compiler version is more thorough in detecting code
inconsistencies, and reports warnings in many cases when building
u-boot for kaen and alex.
This change modifies the code to get rid of the warnings. There
supposed to be no logical changes, so no testing other than
building the system is being done.
The files not yet upstreamed are excluded and will be submitted
separately.
BUG=chromium-os:18862
TEST=manual
. run the following commands
emerge-tegra2_kaen chromeos-u-boot
emerge-x86-alex chromeos-u-boot
. observe them succeed
Change-Id: I4c872d84352539d24a418ba910274d08d02d26a8
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://gerrit.chromium.org/gerrit/5706
Reviewed-by: Simon Glass <sjg@chromium.org>
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This chip is used on x86-alex, so the driver needs to be compilable.
BUG=chrome-os-partner:4722
TEST=Built and booted x86-alex with other SPI changes and the Macronix driver
turned on, saw that the chip was recognized.
Change-Id: Ib7386140cb180be85e7c7ce58d581c2769650c11
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://gerrit.chromium.org/gerrit/5380
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This change modifies the spi_xfer function to take read and write buffers and
read and write bit counts which is similar to what flashrom does. This has the
nice effect of simiplifying many call sights, and will allow integrating SPI
controllers which don't allow arbitrary control of the chip select lines.
Only boards which are being used with ChromeOS and the functionality they use
will be updated immediately. That's because those are the cases which can
actually be tested effectively, and fixing up the other locations can be put
off until later. These change and the eventual change that updates all the
other call sights/drivers can also be reviewed and tested independently. It
will also make rebasing easier.
To try to make the transition less painful, the new interface is selectable
using the CONFIG_NEW_SPI_XFER option. This selects whether the new or old
interface is used.
BUG=chrome-os-partner:4722
TEST=With this and related changes, built for x86-alex, tegra2_kaen,
tegra2_aebl, tegra2_seaboard, and tegra2_asymptote. Flashed the firmware on a
Kaen, verified the checksums matched, and booted to ChromeOS login. Built with
the option turned off on x86-alex and tegra2_kaen.
Change-Id: If32843255584544b08b9c8e18bbd9f36273fb71b
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://gerrit.chromium.org/gerrit/5374
Reviewed-by: Stefan Reinauer <reinauer@google.com>
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The status polling can take a while, so make sure we kick the
watchdog after each successful poll.
Signed-off-by: Patrick Sestier <psestier@mircom.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Avoid relocation problem by fix global declaration.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
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Move the header file and definitions of ftsmc020
static memory control unit from a320 SoC folder to
"drivers/mtd" folder.
This change will let other SoC which also use ftsmc020
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
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I ran into a problem where the reset was failing except when I enabled
debugging support. After talking with Garret Swalling at Spansion I
was told that the GL-N series of devices require a 500ns wait for the
reset to complete. The below patch adds a 1us delay after all reset
commands.
-Aaron Williams
Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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tested on the a4m072 board with a S29GL512P flash.
flinfo without this patch
Bank # 1: CFI conformant flash (16 x 16) Size: 32 MB in 256 Sectors
AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E
Erase timeout: 16384 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 32 bytes
[...]
flinfo with this patch
Bank # 1: CFI conformant flash (16 x 16) Size: 32 MB in 256 Sectors
AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
Erase timeout: 16384 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 32 bytes
[...]
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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The M29W800DT parts also report their geometry with the sector layout
reversed. So add that ID to the flash_fixup_stm function.
Otherwise, we get:
bfin> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 1 MB in 19 Sectors
AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22D7
Erase timeout: 8192 ms, write timeout: 1 ms
Sector Start Addresses:
20000000 20004000 20006000 20008000 20010000
20020000 20030000 20040000 20050000 20060000
20070000 20080000 20090000 200A0000 200B0000
200C0000 200D0000 200E0000 200F0000
Reported-by: Jianxi Fu <fujianxi@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>
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This patch sync with Brian's patch on Linux in nand_flash_detect_onfi()
commit b7b1a29d94c17e4341856381bccb4d17495bea60
Author: Brian Norris <computersforpeace@gmail.com>
Date: Sun Dec 12 00:23:33 2010 -0800
mtd: nand: rearrange ONFI revision checking, add ONFI 2.3
In checking for the ONFI revision, the first conditional (for checking
"unsupported" ONFI) seems unnecessary. All ONFI revisions should be
backwards-compatible; even if this is not the case on some newer ONFI
revision, it should simply fail the second version-checking if-else block
(i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we
move our "unsupported" condition after having checked each bit field.
Also, it's simple enough to add a condition for ONFI revision 2.3. Note
that this does *NOT* mean we handle all new features of ONFI versions
above 1.0.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Florian Fainelli <ffainelli@freebox.fr>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
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This patch sync with David's patch on Linux in nand_flash_detect_onfi()
commit 4ccb3b4497ce01fab4933704fe21581e30fda1a5
Author: David Woodhouse <David.Woodhouse@intel.com>
Date: Fri Dec 3 16:36:34 2010 +0000
mtd: nand: Fix integer overflow in ONFI detection of chips >= 4GiB
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Commit 6ee1416e8184b4d9ebe6087d396a60bcecf3551c (mtd, cfi: introduce
void flash_protect_default(void)) introduced a bug which resulted in
boards that define CONFIG_SYS_FLASH_AUTOPROTECT_LIST not compiling with
the the following errors and warning:
ptyser@petert u-boot $ make -s xpedite520x
Configuring for xpedite520x board...
cfi_flash.c: In function 'flash_protect_default':
cfi_flash.c:2118: error: 'i' undeclared (first use in this function)
cfi_flash.c:2118: error: (Each undeclared identifier is reported only once
cfi_flash.c:2118: error: for each function it appears in.)
cfi_flash.c:2118: error: 'apl' undeclared (first use in this function)
cfi_flash.c:2118: error: invalid application of 'sizeof' to incomplete type 'struct apl_s'
cfi_flash.c: In function 'flash_init':
cfi_flash.c:2137: warning: unused variable 'apl'
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reported-by: Kumar Gala <galak@kernel.crashing.org>
Cc: Heiko Schocher <hs@denx.de>
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Signed-off-by: James Kosin <jkosin@intcomgrp.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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No need for these to be exported as they are only accessed indirectly
via function pointers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The previous unification patch missed setting up the sst read func.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This patch adds a new member to struct spi_flash (u16 sector_size)
and updates the spi flash drivers to start populating it.
This parameter can be used by spi flash commands that need to round
up units of operation to the flash's sector_size.
Having this number in one place also allows duplicated code to be
further collapsed into one common location (such as erase parameter
and the detected message).
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The AT45 flashes are completely different (at the command set and
status register level) from all other SPI flashes, so we can't unify
their logic with common code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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All of the spi flash drivers implement the status register polling for
detecting the device ready state, so unify them all in a new helper
function -- spi_flash_wait_ready.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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These functions largely do the same exact thing, so unify them all
into one basic function.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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collect code which protects default sectors in a function, called
flash_protect_default. So boardspecific code can call it too.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Mario Schuknecht <m.schuknecht@dresearch.de>
Signed-off-by: Steffen Sledz <sledz@dresearch.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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If NCE is hooked up to NCS3, we don't need to (and can't)
explicitly set the state of the NCE pin. Instead, the
controller asserts it automatically as part of a
command/data access. Only "CE don't care"-type NAND chips
can be used in this manner.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
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This patch adds support for reading an ONFI page parameter from a NAND
device supporting it. If this is the case, struct nand_chip onfi_version
member contains the supported ONFI version, 0 otherwise.
This allows NAND drivers past nand_scan_ident to set the best timings for the
NAND chip.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
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Poke the watchdog in a variety of looping constructs, which could take
a long time to complete.
Signed-off-by: Scott Wood <scottwood@freescale.com>
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The function find_sector() does not take into account if the flash bank
has changed since the last call. This could lead to illegal accesses inside
and beyond the flash_info_t info strcture. For example if the current
flash bank has less sectors than the last used flash bank.
This patch adds two cheks. One that insures, that the current sector does
not exceed the allowed maximum (which is always a good idea). And one that
checks if the current access is to the same flash bank as the last access.
If not, the search loop will start with sector 0.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
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There's no compelling reason to have the output on bootup or the
"flinfo" command print "flash" in uppercase, so use the proper case
where appropriate.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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This patch sync with David's patch on Linux for handling nand_scan_ident.
commit 5e81e88a4c140586d9212999cea683bcd66a15c6
Author: David Woodhouse <David.Woodhouse@intel.com>
Date: Fri Feb 26 18:32:56 2010 +0000
mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
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This patch add addition suffix to nand write to give the uboot
the power to directly burn the yaffs image to nand.
Signed-off-by: Lei Wen <leiwen@marvell.com>
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The variable i has to be static, otherwise it would be always zero.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
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Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Signed-off-by: Stefan Roese <sr@denx.de>
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The flash_verbose logic is only used by the CFI MTD layer, so if we aren't
using that, disable the logic completely.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This is part of the timer cleanup effort.
In the future we only use get_timer() in its intended way to
program timeout loops.
reset_timer() shall not be used anymore.
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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These id tables need not be writable.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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