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2012-01-19CHROMIUM: Arm: tegra: mmc: change bounce buffer printf to debugPuneet Saxena
BUG=chromium-os:23496 TEST=Built ok for Cardhu Walgui and Seaboard. Tested on Waluigi. Change-Id: I86d029e09713b0d8f885b97d7ec34119266dfe11 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13699 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2011-12-20CHROMIUM: mmc: Enable 8-bit for eMMCSimon Glass
Until we bring in the newer MMC code from upstream, this enables 8-bit support with a minimum of changes. BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: I5c3f5e6f4003ae63e08208d9afba66aef8d97ccf Reviewed-on: https://gerrit.chromium.org/gerrit/13202 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com> Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-12-20tegra: mmc: Tidy up delays and timeoutsSimon Glass
Timeouts should use get_timer() where possible, and avoid looping with fixed delays. This improves performance. BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: I7e11151ddc0ac2faf14e05593181470558a52ab2 Reviewed-on: https://gerrit.chromium.org/gerrit/13199 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-28mmc: tegra3: Add MMC support for Tegra3 (specifically, waluigi)Doug Anderson
BUG=chromium-os:21540 TEST=Able to talk to MMC1 on Waluigi w/ future config changes. Specifically: 1. mmcinfo 0 - works (shows info) 2. mmcinfo 1 - works (shows info) 3. mmc rescan 1; mmc part 1 - works (shows partitions) Change-Id: I730d3b91088f20ccf7ca20f3f31f7d59514af243 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10661 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-28mmc: tegra: Rename tegra2_mmc to tegra_mmc in prep for tegra3Doug Anderson
BUG=chromium-os:21540 TEST=Built u-boot and booted u-boot on tegra2_kaen Change-Id: Id6f11512ea1a95bd57b600601b488ae20b34db2d Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10808 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make clk_rst.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: Idc12f106caaaf7601de8e66d8440840375eb9c42 Reviewed-on: http://gerrit.chromium.org/gerrit/8637 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-03Initialize a variable gcc 4.6.0 incorrectly thinks can be used uninitializedGabe Black
BUG=None TEST=Built tegra2_kaen successfully. Change-Id: I506cbf33f2d385a895734692f8abd30db9a03c3e Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/8718 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-03CHROMIUM: tegra: mmc: Fixed handling of timeouts.Doug Anderson
For some reason we are getting timeouts in the tegra MMC code when we're reading from external MMC cards. These don't seem to be detrimental if we handle them properly. This CL properly clears the "normal interrupt status register" (norintsts) in error conditions. If we don't do this, when we come back into mmc_send_cmd() the register will still contain status from the last transaction. BUG=chromium-os:20947 TEST=Booted from MMC 1 Also did the following for detailed test: 0. Ran with legacy u-boot and held space at bootup to get prompt. 1. mmc rescan 1 2. fatload mmc 1:c 0x408000 /u-boot/boot.scr.uimg ff 3. md.b 0x408000 0xff 4. Validated that the above looked like the bootscript (aka contained text like "boot-A.scr"). Change-Id: Ie4e7736d9b2055dcb4b28775545291b7eb3e633e Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/8469 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org>
2011-09-15mmc: tidy up mmc now that we are closer to upstreamSimon Glass
I have cherry-picked a few commits which fix bugs in mmc with high capacity devices. So we can revert most of our required changes here. This sorts out remaining unreliability with mmc by increasing the timeout further. BUG=chromium-os:20468 TEST=build and boot on seaboard Change-Id: Ic9ceeadf226b37a05041f4dbcfcb9f285b831cab Reviewed-on: http://gerrit.chromium.org/gerrit/7793 Reviewed-by: Anton Staaf <robotboy@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-15tegra: mmc: Add high capacity flagSimon Glass
This flag indicates that a high capacity device is being used. BUG=chromium-os:20468 TEST=build and boot on seaboard Change-Id: Icb8816d4fc832e7c4de8e7215ccac03ee85c075f Reviewed-on: http://gerrit.chromium.org/gerrit/7792 Reviewed-by: Anton Staaf <robotboy@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-15cherry-pick: mmc: Access mode validation for eMMC cards > 2 GiBŁukasz Majewski
This patch provides handling of the two way handshake when SEND_OP_COND (CMD1) is send to mmc card. It is necessary to inform eMMC card if the host can work with high capacity cards (Jedec JESD84-A441, point 7.4.3). The extra flag MMC_MODE_HC (high capacity) is added to indicate if the host is capable of handling the high capacity eMMC cards. Since this change is added to the generic mmc framework, then it requires other boards to indicate if their mmc controllers can handle high capacity cards. As it is now - the old behaviour of the framework is preserved. Change-Id: I043cbddecbfd046888f715837df50f5440a0d3ca Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Reviewed-on: http://gerrit.chromium.org/gerrit/7791 Reviewed-by: Anton Staaf <robotboy@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-15cherry-pick: mmc: fix the condition for MMC version 4Yoshihiro Shimoda
Fix the problem that if we use the chip of MMC version 4 and the capacity is smaller than 2GB or equal, the mmc->capacity is invalid. According to the JEDEC Standard, the value of ext_csd's capacity is valid if the value is more than 2GB. Change-Id: Idd0cdbbea9dbd17bff626b550bb328e41ae38249 Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Andy Fleming <afleming@freescale.com> Reviewed-on: http://gerrit.chromium.org/gerrit/7790 Reviewed-by: Anton Staaf <robotboy@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-08-29Temporary fix for EMMCSimon Glass
It seems that the timeout / command does not work on Seaboard and Aebl. This gives a 'Card did not respond to voltage select!' error. This commit makes a few changes to fix this temporarily until a permanent solution is found. BUG=chromium-os:19599 TEST=boot; mmc part 0; see that the eMMC is detected and partition table displayed Change-Id: I6471a110a86f7034abc24745b16284a3ceeb3645
2011-08-29mmc: tegra2: fix HC version register offsetVincent Palatin
The ADMA address register has provision to support hardware with 64-bit physical addressing. By the way, on Tegra2 a long is 32 bits, so we need to reserve another 32-bit word to ensure that the next registers are at the right place. BUG=none TEST=run U-Boot on Qemu and check that the host controller version is read at offset 0xfe and no longer at 0xfa Change-Id: I8de2e1e25f29cfe7ba59998c5cb1d711661b280e Reviewed-on: http://gerrit.chromium.org/gerrit/4469 Reviewed-by: Tom Warren <twarren@nvidia.com> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-08-29CHROMIUM: Define the tegra2 internal eMMC media as non-removable.Tom Wai-Hong Tam
The general mmc register call (mmc_register) always sets MMC media as removable. We define the removable flag explicitly and set the internal eMMC media as non-removable. A new fdt field removable is also defined. BUG=chromium-os:16543 TEST=Only able to test compilation withour error. Detailed test should see: http://gerrit.chromium.org/gerrit/#change,2835 Change-Id: Ib8b1742f74c5a9e3fde3801e18c168d00fce47db Reviewed-on: http://gerrit.chromium.org/gerrit/2894 Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
2011-08-29fdt: tegra2: Support SDMMC config through FDTSimon Glass
This adds FDT configuration of USB ports. BUG=chromium-os:11623 TEST=Build and boot u-boot; run mmc_boot Change-Id: I62c015c64e3c3d9996b7117136eb636333fdc0e1 Reviewed-on: http://gerrit.chromium.org/gerrit/2781 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-08-29mmc: Tegra: fix hang in sd_change_freq due to bad buf ptr passed to sd_switchTom Warren
BUG=chromium-os:16770 TEST=run 'crosbug16770' command from the bug, no hangs on dev 1 (SD card) Signed-off-by: Tom Warren <twarren@nvidia.com> Change-Id: I1c130bced28a98ec02dd0baa23747aad183097c0 Reviewed-on: http://gerrit.chromium.org/gerrit/3055
2011-08-29Move GPIO setup to the MMC driverSimon Glass
At present the GPIO setup for MMC is done globally in the board file. This will be kept in the fdt so this commit moves the GPIOs under control of the MMC driver. This means that the initialization will only be done if MMC is enabled, and will pick up the correct board GPIOs when required. Note: I am not sure about this change. It is desirable to have all device-related init in the driver with fdt. But U-Boot tends to split things into board init (which may well init things that are never used) and the drivers (which hope and pray that things are ready). A more invasive change would involve packing the MMC config into a structure in the board file which includes GPIO definitions. That seems like a bridge too far. BUG=chromium-os:11623 TEST=build U-Boot for seaboard, mmc part 0; mmc part 1; see correct output Change-Id: Icdfc07085bfb85be7fabf06dc662c184e77bbed9 Reviewed-on: http://gerrit.chromium.org/gerrit/2778 Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-08-29mmc: Cache line align buffersAnton Staaf
This is required to avoid bounce buffers on ARM. BUG=chromium-os:16317 TEST=run "mmc part 0" and "ext2ls mmc 0:3" on Seaboard Change-Id: I75fd03140d8b36f8e2816d180d915676fe2cc612 Reviewed-on: http://gerrit.chromium.org/gerrit/2326 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Anton Staaf <robotboy@chromium.org>
2011-08-29Tidy up MMC to use to clock APISimon Glass
The MMC driver now uses the peripheral ID to identify which peripheral to use rather than the address of that peripheral. BUG=chromium-os:11623 TEST=build and boot U-Boot on Seaboard mmc part 0; ext2ls mmc 0:3 Change-Id: I42c09bca572349f2c9c2469959857d247a6a359f Reviewed-on: http://gerrit.chromium.org/gerrit/2035 Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
2011-08-24mmc: Tegra2: Enable dcache support by bouncing unaligned requests.Anton Staaf
Dcache support was disabled due to dcache/dma interactions with unaligned buffers. When an unaligned buffer is used for DMA the first and last few bytes of the buffer will be clobbered by the dcache invalidate call that is required to make the contents of the buffer visible to the CPU post DMA. The reason that these bytes are clobbered is that the dcache invalidate code (which is the same as the linux kernels) checks for unaligned invalidates and first flushes the cache lines that are being partially invalidated. This is required because the cache lines may be shared with other variables, and may be dirty. This flush however writes over the first and last few bytes of the unaligned buffer with whatever happened to be in the cache. There are a number of possible solutions: 1) Modify the invalidate code to first read the partial cache line and then invalidate and then write back just the valid part of the line. This suffers from a race condition with concurrent code in interrupt handlers or other CPUs. 2) Modify all of U-Boot to allocate buffers from a block allocation mechanism that ensures they are alligned on cache line boundaries. While this is possible, there are some cases where the public API passes down a buffer pointer all the way to the block read interface. So all stand alone U-Boot programs would have to be fixed as well. 3) Use a bounce buffer that is known to be alligned. Allocate the buffer in the Tegra MMC code and ensure it is large enough for the read/write as well as aligned correctly. This solution requires an extra memcpy of the data read or written and has a high water mark on memory consumption. It can be conditionally used only when the buffer passed in is unaligned. This patch implements the third solution. BUG=None TEST=Run "mmc part 0" and "ext2ls mmc 0:3" on Seaboard Signed-off-by: Anton Staaf <robotboy@chromium.org> Change-Id: I573ad4f0cef8888b24e1cec72a5890cd42244247 Reviewed-on: http://gerrit.chromium.org/gerrit/1836
2011-08-24mmc: Tegra2: Factor out mmc_wait_inhibit functionalityAnton Staaf
This is a well encapsulated section of mmc_send_cmd, by moving it to it's own function it increases the readability of mmc_send_cmd. BUG=None TEST=Run "mmc part 0" on Seaboard Signed-off-by: Anton Staaf <robotboy@chromium.org> Change-Id: I76ff1f8bdebba9814c45abab5f198c58c840567a Reviewed-on: http://gerrit.chromium.org/gerrit/2113
2011-08-24mmc: Tegra2: Add data transfer completion timeoutAnton Staaf
Currently when no expected completion condition occures in the mmc_send_cmd while loop that is waiting for a data transfer to complete the MMC driver just hangs. This patch adds an arbitrary 2 second timeout. If nothing we recognize occures within 2 seconds some diagnostic information is printed and we fail out. BUG=None TEST=Run "mmc part 0" on Seaboard. Signed-off-by: Anton Staaf <robotboy@chromium.org> Change-Id: I7461040a687f4f7b477ed0bf86525fad9246ec28 Reviewed-on: http://gerrit.chromium.org/gerrit/2112
2011-08-24mmc: Tegra2: Support DMA restarts at buffer boundariesAnton Staaf
Currently if a DMA buffer straddles a buffer alignment boundary (512KiB) then the DMA engine will pause and generate a DMA interrupt. Since the DMA interrupt is not enabled it will hang the MMC driver. This patch adds support for restarting the DMA transfer. The SYSTEM_ADDRESS register contains the next address that would have been read/written when a boundary is hit. So we can read that and write it back. The write triggers the resumption of the transfer. BUG=None TEST=Run "mmc part 0" and "ext2ls mmc 0:3" on Seaboard. Signed-off-by: Anton Staaf <robotboy@chromium.org> Change-Id: Iaa7c37dbeb46e8ae987c7eaf1dcb4dd810dd4160 Reviewed-on: http://gerrit.chromium.org/gerrit/2111
2011-08-24Fix incorrect clock setting in MMCSimon Glass
Small fix to correct clock setting code. BUG=chromiums-os:11623 TEST=mmc part 0; ext2ls mmc 0:3 Change-Id: Id573c92ff6011b74538be4c8a67a1b2a58fd46fa Reviewed-on: http://gerrit.chromium.org/gerrit/2108 Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anton Staaf <robotboy@chromium.org>
2011-08-24tegra2: Add clock and PLL control functionsSimon Glass
This adds functions for setting up clocks to peripherals, by selecting a parent clock and specifying a rate. BUG=chromium-os:13228 TEST=Build, boot on Seaboard Change-Id: I957723b5f0ef64244c16f44ae7cbd79abf06427d Reviewed-on: http://gerrit.chromium.org/gerrit/1290 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-08-24mmc: Tegra2: add SD/MMC support for SeaboardTom Warren
SD cards in the RH slot (SDMMC3 controller) are seen OK internel eMMC chip (SDMMC4 controller) is seen OK ext2ls/ext2load work, fatls/fatinfo work, mmc cmds work (read, info, etc.) Card detect for SDIO3 on Seaboard is in place, but not called anywhere. CONFIG_SYS_NO_DCACHE is enabled to to cache coherency issues w/DMA. TBDs to be taken care of in the next phase. V2: Changed clock divisor and card clock divisor values based on 216MHz PLLP0 Added some comments as per Allen Martin's review V3: Added new pinmux_set_func calls in board.c Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=none TEST=as above, on my T20-A03 Seaboard. U-boot.bin loaded via JTAG. Change-Id: I5955707034d41f7606ccf4cc99dd8ab5056c103e Reviewed-on: http://gerrit.chromium.org/gerrit/1745 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Anton Staaf <robotboy@chromium.org>
2011-05-26S5P: add set_mmc_clk for external clock controlJaehoon Chung
This patch added set_mmc_clk for external clock control. c210 didn't support host clock control. So We need external_clock_control function for c210. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-05-26MMC S5P: Fix typoDirk Behme
Fix typo resulting in the compilation error s5p_mmc.c: In function 's5p_mmc_initialize': s5p_mmc.c:469: error: 'struct mmc' has no member named 'm_bmax' introduced by commit "MMC: make b_max unconditional" (8feafcc49c0b7a9c541904f95a43dbef2fecc38b) Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> CC: John Rigby <john.rigby@linaro.org> CC: Andy Fleming <afleming@freescale.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-19Minor coding style cleanup.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-05-18MMC: omap_hsmmc.c: Add missing prototype headerDirk Behme
Add missing header file to fix compilation warning omap_hsmmc.c: In function 'omap_mmc_init': omap_hsmmc.c:474: warning: implicit declaration of function 'get_cpu_family' omap_hsmmc.c:474: warning: implicit declaration of function 'get_cpu_rev' introduced by commit "MMC: omap_hsmmc.c: disable multiblock rw on old rev omap34xx silicon" (4ca9244d74f146a0605f5bee28a66e39aae88d3e) Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> CC: Andy Fleming <afleming@freescale.com> CC: John Rigby <john.rigby@linaro.org>
2011-05-18fsl_esdhc: Initialize mmc->b_maxFabio Estevam
commit 262951(MMC: make b_max unconditional) missed to update fsl_esdhc. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2011-05-18mmc: enable partition switch function for emmcLei Wen
For emmc, it may have up to 7 partitions: two boot partitions, one user partition, one RPMB partition and four general purpose partitions. (Refer to JESD84-A44.pdf/page 154) As bootloader may need to read out or reflashing images on those different partitions, it is better to enable the partition switch with console command support. Also for partition would be restore to user partition(part 0) when CMD0 is used, so change mmc_init routine to perform normal initialization only once for each slot, unless use the rescan command to force init again. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-05-18cmd_mmc: eliminate device num in the mmc commandLei Wen
mmc command applied device, like ide and usb... Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
2011-05-18mmc_spi: generate response for send status commandThomas Chou
A "send status" command is added with the commit "mmc: checking status after commands with R1b response". But the status register returned from send status command of SPI protocol is different from that of MMC/SD protocol. We do a simple test and generate a response in stead of full bit-by-bit translation. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-05-18ATMEL: fix related common atmel driver filesReinhard Meyer
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-05-18avr32: fixup definitions to ATMEL_BASE_xxxAndreas Bießmann
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18avr32: rename memory-map.h -> hardware.hAndreas Bießmann
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-04-29fsl_esdhc: Fix multi-block read restriction on i.MX53 eSDHCv2Jason Liu
For freescale i.MX53 eSDHCv2, when using CMD12, cmdtype need to be set to ABORT, otherwise, next read command will hang. This is a software Software Restrictions in i.MX53 reference manual: 29.7.8 Multi-block Read For pre-defined multi-block read operation, that is,the number of blocks to read has been defined by previous CMD23 for MMC, or pre-defined number of blocks in CMD53 for SDIO/SDCombo,or whatever multi-block read without abort command at card side, an abort command, either automatic or manual CMD12/CMD52, is still required by ESDHC after the pre-defined number of blocks are done, to drive the internal state machine to idle mode. In this case, the card may not respond to this extra abort command and ESDHC will get Response Timeout. It is recommended to manually send an abort command with RSPTYP[1:0] both bits cleared. Signed-off-by: Jason Liu <jason.hui@linaro.org>
2011-04-29MMC: omap_hsmmc.c: disable multiblock rw on old rev omap34xx siliconJohn Rigby
Signed-off-by: John Rigby <john.rigby@linaro.org>
2011-04-29MMC: make b_max unconditionalJohn Rigby
Make existing field b_max field in struct mmc unconditional and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread and mmc_bwrite. Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register if it has not been initialized by the hw driver. Initialize b_max to 0 in all callers to mmc_register. Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-29MMC: Add support for PL180 ARM mmc deviceMatt Waddel
Add support for the ARM PrimeCell MultiMedia Interface - PL180. Ported from original device driver written by ST-Ericsson. Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
2011-04-13MMC may wrongly regconize 2GB eMMC as high capacityRaffaele Recalcati
Hi Terry, > So I guess: > mmc_init calls mmc_send_op_cond  that set  high_capacity, > than it calls mmc_startup, that, with MMC_CMD_SEND_CSD  command, set > the capacity, using values in CSD register. > So I guess that mmc_change_freq should not recalculate high_capacity. > > It seems better, isn't it? > > Regards, > Raffaele > Finally I think that it is enough to apply the following patch in order to fix the issue. Regards, Raffaele Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13mmc: trace addedRaffaele Recalcati
Defining CONFIG_MMC_TRACE in the include board file it is possible to activate a tracing support. This code helps in case of eMMC hw failure or to investigate possible eMMC initialization issues. Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13mmc: SEND_OP_COND considers card capabilities (voltage)Raffaele Recalcati
The first SEND_OP_COND (CMD1) command added is used to ask card capabilities. After it an AND operation is done between card capabilities and host capabilities (at the moment only for the voltage field). Finally the correct value is sent to the MMC, waiting that the card exits from busy state. Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13mmc: checking status after commands with R1b responseRaffaele Recalcati
It is recommended to check card status after these kind of commands. This is done using CMD13 (SEND_STATUS) JEDEC command until the card is ready. In case of error the card status field is displayed. Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13mmc: remove duplicated header fileMinkyu Kang
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13mmc: add generic mmc spi driverThomas Chou
This patch supports mmc/sd card with spi interface. It is based on the generic mmc framework. It works with SDHC and supports multi blocks read/write. The crc checksum on data packet is enabled with the def, There is a subcomamnd "mmc_spi" to setup spi bus and cs at run time. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13mmc: constify & localize dataMike Frysinger
These local vars need not be writable nor exported. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-04-13drivers/mmc/fsl_esdhc.c: reordered testsFrans Meulenbroeks
As DATA_ERROR includes the value IRQSTAT_DTOE, a timeout error would yield the first error return instead of TIMEOUT. By swapping the test TIMEOUTs are reported as such An alternate solution would be to remove the IRQSTAT_DTOE from the DATA_ERROR define but as that one might be less desired I've opted for the simplest solution Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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