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2018-12-19misc: Add JZ47xx efuse driverPaul Burton
Add driver for the efuse block in the JZ47xx SOC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-10Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
Add TFA boot flow for some Layerscape platforms Add support for lx2160a SoC [trini: Add a bunch of missing MAINTAINERS entries] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-06drivers: ifc: dynamic chipselect mapping supportPankit Garg
IFC driver changes to implement the chipselect mappings at run time. Defines init_early_memctl_regs and init_final_memctl_regs with chipselect dynamic mapping for nor and nand boot. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-05cros_ec: Adjust to use v1 vboot context onlySimon Glass
At present there are no users of the 64-byte v2 context. The v1 context is only 16 bytes long and currently an error is raised if too much data is returned from the EC. Update the code to limit the size to 16 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05cros: Correct a printf() string and commentSimon Glass
Correct a warning that occurs on sandbox. Also fix the comment style in cros_ec_set_lid_shutdown_mask(). Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20misc: Update read() and write() methods to return bytes xferedSimon Glass
At present these functions return 0 on success. For some devices we want to know how many bytes were transferred. It seems useful to adjust the API to be more like the POSIX read() and write() functions. Update these two methods, a test and all users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-20cros_ec: Add new features for events and powerSimon Glass
This adds new commands to the EC related to setting and clearing events as well as controlling power-related settings. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Align uclass data to a cache boundarySimon Glass
The LPC driver expects its buffer to be word-aligned. Add the required flag to the uclass driver to ensure this. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Fail if we cannot determine the flash burst sizeSimon Glass
This value is required for flashing to work correctly. Add a check for it. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Add error logging on a few commandsSimon Glass
Add some more logging to provide more information on failures. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Use uint instead of u8 for parametersSimon Glass
There is no advantage to using a u8 for function parameters. It forces the compiler to mask values and can increase code size. Also the command enum has been extended to 16 bits. Update the functions to use uint instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-16misc: fs_loader: Fix compiler warningKeerthy
Fix compiler warning drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects argument of type ‘int’, but argument 5 has type ‘size_t {aka long unsigned int}’ [-Wformat=] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16misc: fs_loader: Use device_get_global_by_ofnode to get to nodeKeerthy
Instead of two staged ofnode_to_offset followed by device_get_global_by_of_offset approach, direcly use the device_get_global_by_ofnode to fetch the device. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14test: dm: pci: Add cases for finding next PCI capability APIsBin Meng
Add test cases to cover the two newly added PCI APIs: dm_pci_find_next_capability() & dm_pci_find_next_ext_capability(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14misc: Add IHS FPGA driverMario Six
Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which supports initialization of the FPGA, as well as information gathering. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-11-14misc: Add gdsys_soc driverMario Six
This patch adds a driver for the bus associated with a IHS FPGA. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-11-14misc: Sort Makefile entriesMario Six
Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-11-14dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()Bin Meng
Currently the comments of several APIs (eg: dm_init_and_scan()) say: @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC flag. If false bind all drivers. The 'Pre-Relocation Support' chapter in doc/driver-model/README.txt documents the same that both device tree properties and driver flag are supported. However the implementation only checks these special device tree properties without checking the driver flag at all. This updates lists_bind_fdt() to consider both scenarios. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in http://patchwork.ozlabs.org/patch/996473/ : Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-28drivers: cosmetic: Convert SPDX license tags to Linux Kernel stylePatrick Delaunay
Complete in the drivers directory the work started with commit 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style"). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-25Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imxTom Rini
Merged imx8 architecture, fix build for imx8 + warnings
2018-10-22misc: imx8: add scfw api impementationPeng Fan
Add clk/misc/pad/pm/rm scfw api implementaion for different drivers to invoke. The low level code is using misc_call to invoke imx8_scu driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2018-10-22misc: add i.MX8 misc driverPeng Fan
Add i.MX8 MISC driver to handle the communication between A35 Core and SCU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2018-10-09cros_ec: Add support for v3 messages on LPCSimon Glass
At present version 3 messages are only supported on SPI. Add support for using LPC as well, as used on samus. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09cros_ec: Update cros_ec_read_hash() to specify the imageSimon Glass
Allow selection of which EC image to hash. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09cros: Update ec_commands to latest versionSimon Glass
This file has changed quite a bit in the last 5 years as the capabilities of the ECs have grown. Sync it up with the copy in coreboot commit b9141f2215. The only change is the addition of EC_VBNV_BLOCK_SIZE_V2. This is needed because U-Boot uses the new v2 vboot API and this is not currently fully supported by Chromium OS firmware. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09cros: Update cros_ec code to use struct udeviceSimon Glass
At present we pass around a private pointer to specify the cros_ec device. With driver model it makes more sense to pass the device. Update the code to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09dm: core: Update ofnode to read binman-style flash entrySimon Glass
At present ofnode_read_fmap_entry() reads a flash map entry in a format which is not supported by binman. To allow use to use binman-format descriptions, update this function. Also add a simple test. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-06misc: Add support for the Arm Versatile Express config busLiviu Dudau
Add support for the Arm Versatile Express config bus that is being used for exposing various subsystems via a generic configuration bus. This driver adds support for generating transactions on this configuration bus and can be used by other drivers to abstract the communication with the actual function providers. Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-09-29Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
Switch to driver model for eSDHC on Layerscape SoCs including LS1021A, LS1043A, LS1046A, LS1088A, LS2088A. Switch to driver model for SATA on LS1021A and LS1043A. Add support for LS1012AFRWY rev C board. Enable SMMU for LS1043A.
2018-09-28common: Generic loader for file systemTien Fong Chee
This is file system generic loader which can be used to load the file image from the storage into target such as memory. The consumer driver would then use this loader to program whatever, ie. the FPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-09-27armv8: ls1043a: enable icid setup for qman portalsLaurentiu Tudor
Enable support for ICID setup of qman portals and the required device tree fixups. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-18misc: Add MPC83xx serdes driverMario Six
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-17Convert CONFIG_TWL4030_LED et al to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_TWL4030_LED CONFIG_TWL4030_INPUT This also removes dead references to: CONFIG_TWL4030_KEYPAD Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-13Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-08-11misc: Add gdsys_ioep driverMario Six
Add driver for the IHS IO endpoint on IHS FPGAs. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11test: Add tests for misc uclassMario Six
Add a set of tests for the misc uclass. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-11misc: uclass: Add enable/disable functionMario Six
Add generic enable/disable function to the misc uclass. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-10armv8: ls1046a: add icid setup for qman portalsLaurentiu Tudor
Add support for ICID setting of qman portals and the required device tree fixups. Also fix an endiness issue in portal setup code. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-10misc: fsl_portals: setup QMAN_BAR{E} also on ARM platformsLaurentiu Tudor
QMAN_BAR{E} register setup was disabled on ARM platforms, however the register does need to be set. Enable the code also on ARMs and fix the CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly enabled code works. Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-08test: dm: pci: Add cases for finding PCI capability APIsBin Meng
Add several PCI capability and extended capability ID registers in the swap_case driver, so that we can add test case for dm_pci_find_capability() and dm_pci_find_ext_capability(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08pci: sandbox: swap_case: Declare dynamic driver matchingBin Meng
This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08pci: sandbox: swap_case: Preserve space indicator bit in BAR registersBin Meng
With the newly added testing of more than one device, we get: => ut dm pci_swapcase Test: dm_test_pci_swapcase: pci.c test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr: Expected "tHIS IS A tESt", got "this is a test" Test: dm_test_pci_swapcase: pci.c (flat tree) test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr: Expected "tHIS IS A tESt", got "this is a test" Failures: 2 The failure only happens on the 2nd swap_case device on the PCI bus. The case passes on the 1st device. It turns out the swap_case driver does not emulate bit#0 in BAR registers as a read-only bit. This corrects the implementation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-20misc: stm32: Add STM32MP1 supportPatrick Delaunay
Following next kernel rcc bindings, we must use a MFD RCC driver which is able to bind both clock and reset drivers. We can reuse and adapt RCC MFD driver already available for MCU SoCs (F4/F7/H7). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-09dm: core: Update of_read_fmap_entry() for livetreeSimon Glass
Update this function to take an ofnode so that it can work with livetree. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-19sandbox: swap_case: Increase number of base address regsSimon Glass
At present the code overruns the bar[] array. Fix this. At the same time, drop the leading / from the "/spl" path so that we can run U-Boot SPL with: spl/u-boot-spl rather than requiring: /path/to/spl/u-boot-spl Reported-by: Coverity (CID: 131199) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-06-05mach-stm32: Enable SPL_RESET_SUPPORT flagPatrice Chotard
Since commit 0e373c0ade8c ("spl: add SPL_RESET_SUPPORT"), reset is supported in SPL, enable this flag for STM32F SoCs family. This allows to remove a specific case in RCC mfd driver. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26stm32mp1: add FUSE command supportPatrick Delaunay
Add support of fuse command (read/write/program/sense) on bank 0 to access to BSEC SAFMEM (4096 OTP bits). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08gdsys: drivers: Add gdsys_rxaui_ctrl driverMario Six
Add a driver for RXAUI control on IHS FPGAs. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08clk: clk_stm32f: Use PLLSAIP as USB 48MHz clockPatrice Chotard
On all STM32F4 and F7 SoCs family (except STM32F429), PLLSAI output P can be used as 48MHz clock source for USB and SDMMC. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Tested By: Bruno Herrera <bruherrera@gmail.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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