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path: root/drivers/fpga
AgeCommit message (Expand)Author
2021-12-17arm: socfpga: arria10: Enable double peripheral RBF configurationTien Fong Chee
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk
2021-03-08arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64Siew Chin Lim
2021-02-23Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodia...Tom Rini
2021-02-23fpga: zynqpl: fix buffer alignmentMichael Walle
2021-02-15image: Adjust the workings of fit_check_format()Simon Glass
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
2021-01-15arm: socfpga: soc64: Add ATF support for FPGA reconfig driverChee Hong Ang
2020-10-09arm: socfpga: agilex: Enable FPGA Full Reconfiguration supportChee Hong Ang
2020-10-09fpga: intel_sdm_mb: Add watchdog resetChee Hong Ang
2020-10-09fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM MailboxChee Hong Ang
2020-09-23fpga: zynqmp: Protect zynqmp_loads() for SPLMichal Simek
2020-09-23fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macrosMichal Simek
2020-08-20xilinx: zynqmp: synchronize firmware call return payloadIbai Erkiaga
2020-08-03fs: fs-loader: Drop dm.h header fileSimon Glass
2020-06-24arm64: xilinx: Print fpga error value in hexT Karthik Reddy
2020-06-24fpga: zynqpl: Flush dcache only for non-bitstream dataT Karthik Reddy
2020-06-24fpga: zynqpl: Check if aes engine is enabledIbai Erkiaga
2020-06-24fpga: zynqpl: Check fpga config completionT Karthik Reddy
2020-06-24fpga: zynqpl: Correct PL bitstream loading sequence for zynqaesSiva Durga Prasad Paladugu
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
2020-05-18common: Drop linux/delay.h from common headerSimon Glass
2020-05-18Fix some checkpatch warnings in calls to udelay()Simon Glass
2020-05-18common: Drop log.h from common headerSimon Glass
2020-05-18common: Drop init.h from common headerSimon Glass
2020-05-18common: Drop image.h from common headerSimon Glass
2020-05-18common: Drop net.h from common headerSimon Glass
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
2020-01-07arm: socfpga: Convert system manager from struct to definesLey Foon Tan
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
2019-10-24arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()Michal Simek
2019-10-24arm64: versal: Rename versal_pm_request to xilinx_pm_requestMichal Simek
2019-10-24arm64: xilinx: Move firmware functions from platform to driverMichal Simek
2019-10-08arm64: zynqmp: use firmware driver to get versionIbai Erkiaga
2019-10-08firmware: zynqmp: create firmware headerIbai Erkiaga
2019-10-08fpga: zynqmp: Fix second local variable declarationMichal Simek
2019-10-08arm64: versal: fpga: Add PL bit stream load supportSiva Durga Prasad Paladugu
2019-07-30fpga: altera: cyclon2: Check function pointer before callingAlexander Dahl
2019-07-30fpga: altera: cyclon2: Fix indentationAlexander Dahl
2019-07-30fpga: altera: cyclon2: Fix most checkpatch warningsAlexander Dahl
2019-07-30fpga: virtex2: Add slave serial programming supportRobert Hancock
2019-07-30fpga: virtex2: Add additional clock cycles after DONE assertionRobert Hancock
2019-07-30fpga: virtex2: Split out image writing from pre/post operationsRobert Hancock
2019-07-30fpga: virtex2: added Kconfig optionRobert Hancock
2019-07-30fpga: virtex2: cosmetic: Cleanup code styleRobert Hancock
2019-07-21fpga: arria10: Fix error in fpga pin configurationDalon Westergreen
2019-05-10spl: socfpga: Implement fpga bitstream loading with socfpga loadfsTien Fong Chee
2019-05-10ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loadingTien Fong Chee
2019-05-10ARM: socfpga: Moving the watchdog reset to the for-loop status pollingTien Fong Chee