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path: root/drivers/fpga/xilinx.c
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2022-07-26fpga: xilinx: pass compatible flags to load() callbackOleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to load a particular FPGA bitstream image. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: pass compatible flags to fpga_load()Oleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to load a particular FPGA bitstream image. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-7-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: xilinx: pass compatible flags to xilinx_load()Oleksandr Suvorov
This flag is used to check whether a Xilinx FPGA driver is able to load a particular FPGA bitstream image. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-6-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: add option for loading FPGA secure bitstreamsOleksandr Suvorov
It allows using this feature without enabling the "fpga loads" command. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-08arm64: versal: fpga: Add PL bit stream load supportSiva Durga Prasad Paladugu
This patch adds PL bitstream load support for Versal platform. The PL bitstream is loaded by making an SMC to ATF which in turn communicates with platform firmware which configures and loads PL bitstream on to PL. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-01fpga: zynqmp: Add secure bitstream loading for ZynqMPSiva Durga Prasad Paladugu
This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-14fpga: allow programming fpga from FIT image for all FPGA driversGoldschmidt Simon
This drops the limit that fpga is only loaded from FIT images for Xilinx. This is done by moving the 'partial' check from 'common/image.c' to 'drivers/fpga/xilinx.c' (the only driver supporting partial images yet) and supplies a weak default implementation in 'drivers/fpga/fpga.c'. Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (On zcu102) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02fpga: xilinx: Avoid using local intermediate bufferSiva Durga Prasad Paladugu
Dont use local temporary buffer for printing out the info instead use directly from memroy. This fixes the issue of stack corruprion due to local buffer overflow. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMPSiva Durga Prasad Paladugu
Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27fpga: xilinx: Check for substring in device ID validationSiva Durga Prasad Paladugu
Check for substrings in deviceID validation check so that it can support xa bitstreams also. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-21fpga: xilinx: Show fpga info if definedMichal Simek
Show fpga_op->info even if desc->iface_fns is not defined. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-01-21fpga: xilinx: Check if fpga operations are definedMichal Simek
Ensure that operations are correctly setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2014-06-11m68k: Fix warnings with gcc 4.6Simon Glass
Most of the warnings seem to be related to using 'int' for size_t. Change this and fix up the remaining warnings and problems. For bootm, the warning was masked by others, and there is an actual bug in the code. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-05-20fpga: Added support to load bit stream from SD/MMCSiva Durga Prasad Paladugu
Added support to load a bitstream image in chunks by reading it in chunks from SD/MMC. Command format: loadfs [dev] [address] [image size] [blocksize] <interface> [<dev[:part]>] <filename> Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20fpga: Define bitstream type based on command selectionMichal Simek
Clean up partial, full and compressed bitstream handling. U-Boot supports full bitstream loading and partial based on detection which is not 100% correct. Extending fpga_load/fpga_loadbitstream() with one more argument which stores bitstream type. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13fpga: xilinx: Simplify load/dump/info function handlingMichal Simek
Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13fpga: xilinx: Avoid CamelCase for in Xilinx_descMichal Simek
No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13fpga: virtex2: Avoid CamelCaseMichal Simek
No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13fpga: spartan3: Avoid CamelCaseMichal Simek
No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13fpga: spartan2: Avoid CamelCaseMichal Simek
No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-05-06fpga: Check device name against bitstream nameMichal Simek
Ensure that wrong bitstream won't be loaded to current device. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-05-06fpga: zynq: Add support for loading bitstreamMichal Simek
Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-05-06fpga: Change the first parameter in fpga_loadbitstreamMichal Simek
All fpga functions use devnum as int. Only fpga_loadbitstream is using it as unsinged long dev. This patch synchronize it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-05-06cmd: fpga: Move fpga_loadbitstream to fpga.cMichal Simek
In bitstream decoding you can directly check device which you want to load and in fpga.c are fpga_validate and fpga_dev_info functions which should be used for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-04-01Consolidate bool typeYork Sun
'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
2011-08-01fpga: constify to fix build warningWolfgang Denk
Fix compiler warning: cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data' from incompatible pointer type Adding the needed 'const' here entails a whole bunch of additonal changes all over the FPGA code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
2009-10-03fpga: Remove relocation fixupsPeter Tyser
PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-12-05FPGA: move fpga drivers to drivers/fpgaJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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