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path: root/drivers/clk
AgeCommit message (Expand)Author
2020-04-13Merge branch 'next'Tom Rini
2020-04-08Merge tag 'u-boot-amlogic-20200406' of https://gitlab.denx.de/u-boot/custodia...Tom Rini
2020-04-07Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u...Tom Rini
2020-04-06clk: meson: reset mmc clock on probeJerome Brunet
2020-04-06clk: meson-g12a: missing breakHeinrich Schuchardt
2020-04-05clk: socfpga: Read the clock parent's register base in probe functionChee Hong Ang
2020-04-02clk: rk3399: Set empty for vopl assigned-clocksJagan Teki
2020-03-30clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2Marek Vasut
2020-03-24clk: stm32mp1: add SPI5_K supportPatrick Delaunay
2020-03-24clk: stm32mp1: correct CKSELR masksPatrick Delaunay
2020-03-05x86: remove dead code in intel_clk_get_rate()Heinrich Schuchardt
2020-02-28versal: drivers: clk: Fix invalid clock name queriesRajan Vaja
2020-02-14Merge tag 'u-boot-stm32-20200214' of https://gitlab.denx.de/u-boot/custodians...Tom Rini
2020-02-13clk: stm32mp1: solve type issue in stm32mp1_lse_enable and stm32mp1_clktreePatrick Delaunay
2020-02-12CLK: HSDK: fix HDMI clock calculationEugeniy Paltsev
2020-02-12CLK: HSDK: Check for PLL bypass firstlyEugeniy Paltsev
2020-02-11Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini
2020-02-07x86: Add a clock driver for Intel devicesSimon Glass
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
2020-02-05clk: Rename free() to rfree()Simon Glass
2020-01-30arm: rockchip: Add common cru.hJagan Teki
2020-01-26clk: imx: pllv3: fix potential 'divide by zero' in av_set_rate()Giulio Benetti
2020-01-26clk: imx: pllv3: fix potential 'divide by zero' in av_get_rate()Giulio Benetti
2020-01-26clk: imx: pllv3: fix potential 'divide by zero' in sys_get_rate()Giulio Benetti
2020-01-26clk: Fix error checking of dev_read_addr_ptrSean Anderson
2020-01-26clk: uclass: clk_get_by_name() must not be available if CONFIG_OF_PLATDATA is...Giulio Benetti
2020-01-26clk: show more error info when uclass_get_device_by_namePeng Fan
2020-01-26clk: mediatek: use unsigned type for returning the clk rateFabien Parent
2020-01-20Merge tag '2020-01-20-ti-2020.04' of https://gitlab.denx.de/u-boot/custodians...Tom Rini
2020-01-20clk: sci-clk: add slack to clk-set-rate passed to firmwareLokesh Vutla
2020-01-17common: Move get_tbclk() to time.hSimon Glass
2020-01-17common: Move clock functions into a new fileSimon Glass
2020-01-16clk: mediatek: fix clock-rate overflow problemSam Shih
2020-01-16clk: mediatek: add driver for MT7622Sam Shih
2020-01-16clk: fixed_rate: add dummy enable() functionChunfeng Yun
2020-01-16clk: add APIs to get (optional) clock by name without a deviceChunfeng Yun
2020-01-16clk: check valid clock by clk_valid()Chunfeng Yun
2020-01-16clk: fix error check for devm_clk_get_optional()Chunfeng Yun
2020-01-16clk: mediatek: mt7629: add support for ssusbsysChunfeng Yun
2020-01-16clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pllmingming lee
2020-01-16clk: mediatek: add set_clr_upd mux type flowmingming lee
2020-01-16clk: mediatek: add driver support for MT8512mingming lee
2020-01-14clk: imx: add i.IMXRT1050 clk driverGiulio Benetti
2020-01-14clk: imx: pfd: add set_rate()Giulio Benetti
2020-01-14clk: imx: pllv3: add support for PLLV3_AV typeGiulio Benetti
2020-01-14clk: imx: pllv3: add PLLV3_SYS supportGiulio Benetti
2020-01-14clk: imx: pllv3: add set_rate() supportGiulio Benetti
2020-01-14clk: imx: pllv3: add disable() supportGiulio Benetti
2020-01-14clk: imx: pllv3: add enable() supportGiulio Benetti