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path: root/drivers/clk
AgeCommit message (Expand)Author
2019-02-09clk: stm32mp1: correctly handle Clock Spreading GeneratorPatrick Delaunay
2019-02-09clk: stm32mp1: add debug informationPatrick Delaunay
2019-02-09clk: stm32mp1: recalculate counter when switching freqPatrick Delaunay
2019-02-09clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRRPatrick Delaunay
2019-02-09clk: stm32mp1: add IPCC clockPatrick Delaunay
2019-02-09clk: stm32mp1: no more get ck_usbo_48m in device treePatrick Delaunay
2019-02-01rockchip: clk: Add mention of four new clocksSimon Glass
2019-02-01clk: Improve debug message in clk_set_default_rates()Simon Glass
2019-02-01rockchip: rk3288: Add i2s pinctrl and clock supportSimon Glass
2019-01-30sunxi: clk: enable clk and reset for CCU devicesAndre Przywara
2019-01-29sunxi: clk: A80: add MMC clock supportAndre Przywara
2019-01-29sunxi: clk: add MMC gates/resetsAndre Przywara
2019-01-18clk: sunxi: Add Allwinner A80 CLK driverJagan Teki
2019-01-18clk: sunxi: Add Allwinner H6 CLK driverJagan Teki
2019-01-18clk: sunxi: Implement UART resetsJagan Teki
2019-01-18clk: sunxi: Implement UART clocksJagan Teki
2019-01-18clk: sunxi: Add Allwinner V3S CLK driverJagan Teki
2019-01-18clk: sunxi: Add Allwinner R40 CLK driverJagan Teki
2019-01-18clk: sunxi: Add Allwinner A83T CLK driverJagan Teki
2019-01-18clk: sunxi: Add Allwinner A23/A33 CLK driverJagan Teki
2019-01-18clk: sunxi: Add Allwinner A31 CLK driverJagan Teki
2019-01-18clk: sunxi: Add Allwinner A10s/A13 CLK driverJagan Teki
2019-01-18clk: sunxi: Add Allwinner A10/A20 CLK driverJagan Teki
2019-01-18clk: sunxi: Add Allwinner H3/H5 CLK driverJagan Teki
2019-01-18reset: Add Allwinner RESET driverJagan Teki
2019-01-18clk: Add Allwinner A64 CLK driverJagan Teki
2019-01-14clk: MediaTek: bind ethsys reset controllerWeijie Gao
2019-01-09clk: imx8: fix build warningPeng Fan
2018-12-29clk: uniphier: add NAND 200MHz clockMasahiro Yamada
2018-12-06clk: stm32: add hardware spinlock clockBenjamin Gaignard
2018-12-06clk: Allow clock defaults to be set during re-reloc state for SPL onlyPhilipp Tomsich
2018-12-03Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2018-12-03ARM: meson: Add regmap support for clock driverLoic Devulder
2018-12-03clk: renesas: Allow reconfiguring SDHI clock on Gen3Marek Vasut
2018-11-30rockchip: rk3399: Initialize CPU B clock.Christoph Muellner
2018-11-30ARM: rockchip: rv1108: Sync clock with vendor treeOtavio Salvador
2018-11-29Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogicTom Rini
2018-11-28clk: MediaTek: add clock driver for MT7623 SoC.Ryder Lee
2018-11-28clk: MediaTek: add clock driver for MT7629 SoC.Ryder Lee
2018-11-26clk: Add clock driver for AXGNeil Armstrong
2018-11-26ARM: meson: rework soc arch file to prepare for new SoCJerome Brunet
2018-11-26clk: meson: silence debug printJerome Brunet
2018-11-26clk: meson: add static to meson_gates tableNeil Armstrong
2018-11-20misc: Update read() and write() methods to return bytes xferedSimon Glass
2018-11-20clk: meson: fix clk81 divider calculationJerome Brunet
2018-11-16clk: Allow clock defaults to be set also during re-reloc stateAndreas Dannenberg
2018-11-14clk: Remove DM_FLAG_PRE_RELOC flag in various driversBin Meng
2018-11-05aspeed: ast2500: fix D2-PLL clock setting in RGMII modeCédric Le Goater
2018-11-05aspeed: ast2500: fix missing break in D2PLL clock enablementCédric Le Goater
2018-10-28drivers: cosmetic: Convert SPDX license tags to Linux Kernel stylePatrick Delaunay