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2024-03-21doc: board: ti: k3: Mention TI_DM argumentNeha Malcom Francis
commit 09a17b0d01dd7c81f6fd96228581d7df47a1a7b1 upstream Mention TI_DM argument can be used to fetch a custom DM binary in the A72 build instructions for K3 devices. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Andrew Davis <afd@ti.com>
2023-12-01Merge tag '09.01.00.006' into toradex_ti-09.01.00.006Emanuele Ghidoli
RC Release 09.01.00.006
2023-10-12docs: k3: Add secure booting documentationManorit Chawdhry
This commit adds a general flow to explain the usage of firewalls and the chain of trust in K3 devices. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-08-30Merge tag '09.00.00.008' into toradex_ti-u-boot-2023.04Marcel Ziswiler
RC Release 09.00.00.008
2023-07-12board: toradex: verdin-am62: binman enablementMarcel Ziswiler
Binman enablement. Upstream-Status: Pending Binman support missing upstream Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-07-11board: toradex: add verdin am62 supportMarcel Ziswiler
This adds initial support for the Toradex Verdin AM62 Quad 1GB WB IT V1.0A module. They are strapped to boot from their on-module eMMC. U-Boot supports booting from the on-module eMMC only, DFU support is disabled for now due to missing AM62x USB support. Boot sequence is: SYSFW ---> R5 SPL (both in tiboot3.bin) ---> ATF (TF-A) ---> OP-TEE ---> A53 SPL (part of tispl.bin) ---> U-boot proper (u-boot.img) Upstream-Status: Pending V2 has been sent [1] and a re-based V3 will be sent once the upstream TI stuff sufficiently stabilizes. [1] https://lore.kernel.org/all/20230612205444.363727-4-marcel@ziswiler.com Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-07-07configs: k3: Remove saved environmentsManorit Chawdhry
Having saved environments usually causes inconsistencies while in development workflow. The saved environments conflict with the default ones that U-boot should be updating during development but that doesn't happen and the saved environments need to be reset during bootups to test the changes causing extra debugs. Remove the saved environments as a default. Environments can always be re-enabled locally if one does like them or needs them for some production environment. Optionally, Uenv.txt can also be used on some of the boot media. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-06-19docs: board: ti: Fit signature signingManorit Chawdhry
Add documentation for signing secondary platforms as a part of enabling the fit signature signing in u-boot. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-06-15doc: board: ti: add documenation for j7200Udit Kumar
This patch adds documentation for j7200 SOC Acked-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Judith Mendez <jm@ti.com>
2023-06-01board: ti: j721e: README: Update README to include documention for j7200Aswath Govindraju
Update README to add j7200 specific commands and memory layout for eMMC and OSPI. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2023-05-25doc: board: ti: Update documentation for binman flowNeha Malcom Francis
Earlier documentation specified builds for generating bootloader images using an external TI repository k3-image-gen and core-secdev-k3. Modify this to using the binman flow so that user understands how to build the final boot images. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-16Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled regionManorit Chawdhry
In non-combined boot flow for K3, all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked. The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents. The commit changes R5 MCU scratchpad for j721e to an SRAM region. Old Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c85b20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf5bfc) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc) New Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ EMPTY │ ├─────────────────────────────────────┤ 0x41c81920 │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ ├─────────────────────────────────────┤ 0x41c85920 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf59f0) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ 0x41cff9fc │ NEW MCU SCRATCHPAD │ │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc) Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT") Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> [n-francis@ti.com: SRAM allocation addressing diagram] Signed-off-by: Neha Francis <n-francis@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-04-11doc: ti: Add switch setting for boot modes on AM62 SKJudith Mendez
commit 354c05f265eb42ef90e5411ddad684f752d0587b upstream. List some common boot modes and their corresponding switch settings for AM62 SK. Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
2023-03-27x86: minnowmax: Fix up adjustment of CONFIG_TEXT_BASESimon Glass
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between several settings. Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC cache out of the way too. Add documentation on how to make this change safely. Fixes: 66e2c665f3b6 ("x86: minnowmax: Adjust CONFIG_TEXT_BASE") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-02-28board: rockchip: add Radxa ROCK5B Rk3588 boardEugen Hristev
ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa. There are tree variants depending on the DRAM size : 4G, 8G and 16G. Specification: Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x HDMI output, 1x HDMI input Ethernet port 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 54mm Kernel commits: a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board") 6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28board: rockchip: Add Edgeble Neural Compute Module 6Jagan Teki
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module based on Rockchip RK3588 from Edgeble AI. General features: - Rockchip RK3588 - up to 32GB LPDDR4x - up to 128GB eMMC - 2x MIPI CSI2 FPC On module WiFi6/BT5 is available in the following Neu6 variants. Neural Compute Module 6(Neu6) IO board is an industrial form factor ready-to-use IO board from Edgeble AI. IO board offers plenty of peripherals and connectivity options and this patch enables basic eMMC and UART which is enough to successfully boot Linux. Neu6 needs to mount on top of this IO board in order to create a complete Edgeble Neural Compute Module 6(Neu6) IO platform. Boot log for the record, DDR Version V1.08 20220617 LPDDR4X, 2112MHz channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB Manufacturer ID:0x6 CH0 RX Vref:31.7%, TX Vref:21.8%,21.8% CH1 RX Vref:30.7%, TX Vref:22.8%,23.8% CH2 RX Vref:30.7%, TX Vref:22.8%,22.8% CH3 RX Vref:30.7%, TX Vref:21.8%,21.8% change to F1: 528MHz change to F2: 1068MHz change to F3: 1560MHz change to F0: 2112MHz out U-Boot SPL 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530) Trying to boot from MMC1 INFO: Preloader serial: 2 NOTICE: BL31: v2.3():v2.3-391-g856309329:derrick.huang NOTICE: BL31: Built : 14:15:50, Jul 18 2022 INFO: ext 32k is not valid INFO: GICv3 without legacy support detected. INFO: ARM GICv3 driver initialized in EL3 INFO: system boots from cpu-hwid-0 INFO: idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001 INFO: dfs DDR fsp_params[0].freq_mhz= 2112MHz INFO: dfs DDR fsp_params[1].freq_mhz= 528MHz INFO: dfs DDR fsp_params[2].freq_mhz= 1068MHz INFO: dfs DDR fsp_params[3].freq_mhz= 1560MHz INFO: BL31: Initialising Exception Handling Framework INFO: BL31: Initializing runtime services WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK ERROR: Error initializing runtime service opteed_fast INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0xa00000 INFO: SPSR = 0x3c9 U-Boot 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530) Model: Edgeble Neu6A IO Board DRAM: 7.5 GiB (effective 3.7 GiB) Core: 71 devices, 15 uclasses, devicetree: separate MMC: mmc@fe2c0000: 0 Loading Environment from nowhere... OK In: serial@feb50000 Out: serial@feb50000 Err: serial@feb50000 Model: Edgeble Neu6A IO Board Net: No ethernet found. Hit any key to stop autoboot: 0 => Add support for Edgeble Neu6 Model A IO Board. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28evb-rk3568: Update MAINTAINERS and documentationChris Morgan
Update the MAINTAINERS file to include the devicetree for the rk3568-evb1-v10 board. Also update Rockchip board docs to include information on building RK3568 based devices. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28rockchip: Use an external TPL binary on RK3568Jonas Karlman
Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps back to BootRom to load next stage, U-Boot SPL, into DRAM. BootRom then jumps to U-Boot SPL to continue the normal boot flow. However, there is no support to initialize DRAM on RK35xx SoCs using U-Boot TPL and instead an external TPL binary must be used to generate a bootable u-boot-rockchip.bin image. Add CONFIG_ROCKCHIP_EXTERNAL_TPL to indicate that an external TPL should be used. Build U-Boot with ROCKCHIP_TPL=/path/to/ddr.bin to generate a bootable u-boot-rockchip.bin image for RK3568. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-02-19board: gateworks: venice: move README to RSTTim Harvey
Move board/gateworks/venice/README to RST documentation. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-02-19doc: board: bcm7xxx: Convert to reStructuredText formatThomas Fitzsimmons
Convert the documentation for the Broadcom BCM7445 and BCM7260 boards to reStructuredText format and add the new filename to doc/board/broadcom/index.rst. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-02-17riscv: Rename Andes cpu and board namesLeo Yu-Chi Liang
The current ae350-related defconfigs could also support newer Andes CPU IP, so modify the names of CPU from ax25 to andesv5, and board name from ax25-ae350 to ae350. Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-01Merge tag 'u-boot-imx-20230201' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx For 2023.04 ----------- - several conversion to DM_SERIAL and DM_I2C - fixes for Toradex boards - PSCI CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14965
2023-01-31Merge tag 'u-boot-amlogic-20230131' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - jethub j100: add rescue boot from microSD - move meson sm command to cmd/meson and add efusedump sub-command - switch dwc2 otg to DM for G12A, GXL & AXG - Add new boards: - Odroid Go Ultra - Odroid-N2L
2023-01-31imx: Suggest the NXP ATF github repoFabio Estevam
As explained in the text at the bottom of the page https://source.codeaurora.org/external/imx/imx-atf: "QUIC repositories on this site will not receive any updates after March 31, 2022, and will be deleted on March 31, 2023." Point to the NXP ATF github repo instead. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2023-01-30imx8mm-phg: Add board supportFabio Estevam
Add the board support for the i.MX8MM Cloos PHG board. This board uses a imx8mm-tqma8mqml SoM from TQ-Group. imx8mm-phg.dts and imx8mm-tqma8mqml.dtsi are taken directly from Linux 6.2-rc3. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-30ARM: meson: Add support for Odroid-N2LNeil Armstrong
ODROID-N2L is a variant SBC in small form factor and some peripherals are removed from ODROID-N2PLUS based on S922X SoC. - On-board ethernet is removed - On-board RTC is removed - USB 3.0 hub is removed, so one USB 2.0 and one USB 3.0 host ports are available - Huge heatsink is replaced with 40x40mm heatsink, 5V active heatsink is recommended or a tall passive sink is optional - 3.5mm earjack is removed - IR remote receiver is removed - MIPI DSI port is added It doesn't use the odroid-n2 board support since ADC revision collides with Odroid-N2+ and since it doesn't have on-board ethernet no need to load the MAC address from eFuses. Link: https://lore.kernel.org/r/20230126-u-boot-odroid-n2l-v1-2-c60f695e0f6c@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-27doc: add rst references to distro documentation in stm32mp1 boardPatrick Delaunay
Use internal rst reference with :doc: to have a link to distro.rst page in the generated U-Boot documentation. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-27doc: sl-mx8mm: Add CROSS_COMPILE to U-Boot make call and improve commentFrieder Schrempf
Add the CROSS_COMPILE flag as we assume we build in a cross environment. Also improve the comment about copying the binary to SD card. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2023-01-27doc: sl-mx8mm: Add guide for copying the bootloader to SPI NORFrieder Schrempf
This adds a guide for copying the raw bootloader image on the SD card to the SPI NOR using U-Boot itself. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2023-01-27doc: sl-mx8mm: Update references to latest DDR firmware 8.18Frieder Schrempf
Use the latest firmware available from NXP. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2023-01-27doc: sl-mx8mm: Update the NXP TF-A source referenceFrieder Schrempf
Use the latest version of the NXP TF-A code and add a note about quirks with GCC 12. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Convert Note: to ..note:: Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-01-27doc: sl-mx8mm: Add note about using cross toolchainFrieder Schrempf
This clarifies the usage of a cross toolchain to build U-Boot and TF-A. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2023-01-27doc: sl-mx8mm: Mention OSM 1.1 supportFrieder Schrempf
The latest revision of the SoM is compliant to OSM 1.1. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2023-01-20doc: fix references to distro documentationDario Binacchi
Commit 37c5195dfcd157 ("doc: Move distro boot doc to rST") renamed doc/README.distro to doc/develop/distro.rst. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Soeren Moch <smoch@web.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-01-20ARM: meson: add support for Odroid Go UltraNeil Armstrong
This adds initial support for the Hardkernel Odroid Go Ultra. The Odroid Go Ultra is a portable gaming device with the following characteristics: - Amlogic S922X SoC - RK817 & RK818 PMICs - 2GiB LPDDR4 - On board 16GiB eMMC - Micro SD Card slot - 5inch 854×480 MIPI-DSI TFT LCD - Earphone stereo jack, 0.5Watt 8Ω Mono speaker - Li-Polymer 3.7V/4000mAh Battery - USB-A 2.0 Host Connector - x16 GPIO Input Buttons - 2x ADC Analog Joysticks - USB-C Port for USB2 Device and Charging The following are not yet handled: - Battery RK818 Gauge and Charging - 5inch 854×480 MIPI-DSI TFT LCD Link: https://lore.kernel.org/r/20230119-u-boot-odroid-go-ultra-v1-2-f96bab9db396@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-18x86: Fix saying arch_cpu_init_dm in debug/docsTom Rini
The function arch_cpu_init_dm was renamed to fsp_setup_pinctrl in these cases, so rename debug / docs to match. Cc: Simon Glass <sjg@chromium.org> Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-16rockchip: add support for PX30 Ringneck SoM on Haikou DevkitQuentin Schulz
The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip PX30 in a micro Qseven-compatible form-factor. PX30-µQ7 features: * CPU: quad-core Cortex-A35 * DRAM: 2GB dual-channel * eMMC: onboard eMMC * SD/MMC * TI DP83825I 10/100Mbps PHY * USB: * USB2.0 dual role port * 3x USB2.0 host via onboard USB2.0 hub * Display: MIPI-DSI * Camera: MIPI-CSI * onboard 2.4GHz WiFi + Bluetooth module * Companion Controller: on-board additional microcontroller (STM32 Cortex-M0 or ATtiny): * RTC * fan controller * CAN (only STM32) The non-U-Boot DTS files are imported from Linux v6.2-rc2. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16board: rockchip: Add Edgeble Neu2 IO BoardJagan Teki
Neural Compute Module 2(Neu2) IO board is an industrial form factor IO board from Edgeble AI. General features: - microSD slot - MIPI DSI connector - 2x USB Host - 1x USB OTG - Ethernet - mini PCIe - Onboard PoE - RS485, RS232, CAN - Micro Phone array - Speaker - RTC battery slot - 40-pin expansion Neu2 needs to mount on top of this IO board in order to create complete Edgeble Neural Compute Module 2(Neu2) IO platform. Add support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-13Merge tag 'u-boot-stm32-20230113' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm Add driver to manage onboard hub supplies Add calibration support for stm32-adc Linux kernel v6.1 DT synchronization for stm32mp151.dtsi stm32mp157a-dk1-scmi-u-boot.dtsi update Add support of OP-TEE and STM32MP13x in bsec driver ECDSA various fixes for stm32mp
2023-01-12stm32mp: Add OP-TEE support in bsec driverPatrick Delaunay
When OP-TEE is used, the SMC for BSEC management are not available and the STM32MP BSEC pseudo TA must be used (it is mandatory for STM32MP13 and it is a new feature for STM32MP15x). The BSEC driver try to open a session to this PTA BSEC at probe and use it for OTP read or write access to fuse or to shadow. This patch also adapts the commands stm32key and stboard to handle the BSEC_LOCK_PERM lock value instead of 1. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-11Use `grep -E` or plain `grep` instead of `egrep`Ville Skyttä
`egrep` has been deprecated in GNU grep since 2007, and since 3.8 it emits obsolescence warnings: https://git.savannah.gnu.org/cgit/grep.git/commit/?id=a9515624709865d480e3142fd959bccd1c9372d1 Acked-by: Dhruva Gole <d-gole@ti.com>
2023-01-09Merge branch 'next'Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-29doc: board: qemu-ppce500: Update supported and unsupportedPali Rohár
qemu can emulate also e500v1 core but cannot emulate CPUs from Freescale PowerPC QorIQ T and P series. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-12-29doc: ti: add the K3 generation pageBryan Brattlof
Texas Instrument's entire K3 generation of SoCs use much of the same frameworks and boot flow, especially at the uboot level. Though there are small differences introduced as each new K3 based SoC is developed and as the K3 generation matures that will also need to be documented. Rather than copying the same documentation, with the small differences applicable to that specific SoC to a new page, introduce a new K3 page that can describe the general boot flow and design decisions for the entire K3 generation of chips, leaving the specifics for that particular SoC to a unique sub-page below this one. Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-12-29doc: ti: reorganize existing ti docsBryan Brattlof
Texas Instruments produces quite a lot of SoCs based upon a common architecture 'generation'. (eg: OMAP, K3) TI's existing documentation layout makes noticing this generation jump rather difficult. To make navigation easier, split the existing documentation into individual SoC families so we may begin grouping them according to their generational (eg: OMAP, K3) families. Signed-off-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-12-05global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_*Tom Rini
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-02doc: board: typo GIUD Microchip MPFS Icicle Kit docHeinrich Schuchardt
%s/GIUD/GUID/ Fixes: 9e550e18305f ("doc: board: Add Microchip MPFS Icicle Kit doc") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-12-02doc: board: j721e_evm: Fix code-block type and indentsAndrew Davis
* BASH code should be labeled as such. * Code blocks should be indented by 4 spaces. Fix these here. Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-12-02doc: board: j721e_evm: Add DM firmware stepsAndrew Davis
J721e needs DM firmware when using updated SYSFW. Add steps to fetch, build, and deploy the same. Signed-off-by: Andrew Davis <afd@ti.com>
2022-11-21Nokia RX-51: Document debugging options and compile commandPali Rohár
Add example command how to compile U-Boot and add new documentation section describing how to enable early debug UART and verbose log output for N900. Signed-off-by: Pali Rohár <pali@kernel.org>
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