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2020-11-17sunxi: a64: Add a defconfig for the PinePhoneSamuel Holland
The PinePhone is a smartphone produced by Pine64, with an A64 SoC, 2 or 3 GiB LPDDR3 RAM, 16 or 32 GiB eMMC, 720x1440 MIPI-DSI panel, and Quectel EG25-G modem. There are two main board revisions: 1.1 for early adopters, and 1.2 for mass production. Since there is code to detect the board revision at boot, one config/image can support both boards. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-16Merge tag 'ti-v2021.01-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix Nokia RX-51 boot issues - Fix CONFIG_LOGLEVEL on K3 devices - Add phyBOARD REGOR support
2020-11-15configs: am65/j72x: Set CONFIG_LOGLEVEL to 7Roger Quadros
By default CONFIG_LOGLEVEL seems to be set to 4 which is too low and doesn't show dev_info/dev_notice/dev_warn messages on console. This has been deliberately set low globally to be conservative setting across the board due to primary bootloader size limitations. It is best to tune per board config as per user needs. On K3 we have separate SPL and u-boot configs so we can afford to set u-boot CONFIG_LOGLEVEL to 7. On AM65 this patch causes u-boot.img size to change from 932KB to 940KB with 1 line additional print during MMC boot. i.e. details of Net subsystem "Net: K3 CPSW: nuss_ver: 0x6BA00102 cpsw_ver: 0x6BA80102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000" Similar 8KB difference was seen on J721E. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2020-11-15Nokia RX-51: Convert to CONFIG_DM_I2CPali Rohár
Use twl4030_i2c_read(), i2c_get_chip_for_busnum() and remove CONFIG_SYS_I2C. Signed-off-by: Pali Rohár <pali@kernel.org>
2020-11-15ARM: am335x: Add phyBOARD REGOR supportParthiban Nallathambi
phyBOARD-REGOR is based on phyCORE AM335x R2 SoM (PCL060). CPU : AM335X-GP rev 2.1 Model: Phytec AM335x phyBOARD-REGOR DRAM: 512 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 eth0: ethernet@4a100000 Working: - Eth0 - i2C - MMC/SD - NAND - UART - USB (host) Device trees were taken from Linux mainline: commit c4d6fe731176 ("Linux 5.9.0") Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-13rockchip: Pinebook Pro: Fix USBPeter Robinson
Improve USB config so keyboard and USB-A ports work. Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2020-11-13rockchip: rockpro64: fix boot from SPI flash on spi1Hugh Cole-Baker
Commit c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob") added an alias spi1 referring to spi@ff1d0000, however there was already an alias spi0 referring to the same node in rockpro64's u-boot.dtsi, and having both aliases present broke booting from SPI flash for this board. Remove the spi0 alias, set the default bus for SPI flash to 1, and enable support for numbered aliases in SPL so that it uses the same bus numbering as U-Boot proper. This fixes booting from U-Boot in SPI flash on the rockpro64 board. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Suggested-by: Simon Glass <sjg@chromium.org> Fixes: c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob") Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-13rockchip: gru: Allow setting up clocks in U-Boot properAlper Nebi Yasak
Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in U-Boot proper") fixes some clock issues when chainloading U-Boot on rk3288 chromebooks. Part of that change is still available in veyron's board_early_init_r() function. Since chain-loading U-Boot proper from vendor firmware is possible on gru boards as well, do the same thing for them too. On rk3399, this needs to detect whether SPL was run via handoff, so enable that and bloblist kconfigs it needs for chromebook_bob. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-09configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-11-06Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Add a new SMBIOS parser and enable it when booting from coreboot - Fix up various driver names to avoid dtoc warnings - Fully enable ACPI support on Google Chromebook Coral - Add a way to set SMBIOS properties using the devicetree - Update existing boards to use devicetree for SMBIOS using a new default sysinfo driver
2020-11-06smbios: Drop the unused Kconfig optionsSimon Glass
Now that we can use devicetree to specify this information, drop the old CONFIG options. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Provide default SMBIOS manufacturer/productSimon Glass
Add a file containing defaults for these, using the existing CONFIG options. This file must be included with #include since it needs to be passed through the C preprocessor. Enable the driver for all x86 boards that generate SMBIOS tables. Disable it for coral since it has its own driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: reword the commit message a little bit] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06arm64: mvebu: Use devicetree for SMBIOS settings on uDPUSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06odroid-c2: Use devicetree for SMBIOS settingsSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULXSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06rockchip: Use devicetree for SMBIOS settingsSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06board: Rename uclass to sysinfoSimon Glass
This uclass is intended to provide a way to obtain information about a U-Boot board. But the concept of a U-Boot 'board' is the whole system, not just one circuit board, meaning that 'board' is something of a misnomer for this uclass. In addition, the name 'board' is a bit overused in U-Boot and we want to use the same uclass to provide SMBIOS information. The obvious name is 'system' but that is so vague as to be meaningless. Use 'sysinfo' instead, since this uclass is aimed at providing information on the system. Rename everything accordingly. Note: Due to the patch delta caused by the symbol renames, this patch shows some renamed files as being deleted in one place and created in another. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Boot coral into Chrome OS by defaultSimon Glass
Add a script to boot Chrome OS from the internal MMC. This involved adding a few commands and options. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Use CONFIG_CHROMEOS_VBOOT for verified bootSimon Glass
At present CONFIG_CHROMEOS is used to determine whether verified boot is in use. The code to implement that is not in U-Boot mainline. However, it is useful to be able to boot a Chromebook in developer mode in U-Boot mainline without needing the verified boot code. To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot should be used, and CONFIG_CHROMEOS to indicate that the board supports Chrome OS. That allows us to define CONFIG_CHROMEOS on coral. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05coreboot: make use of smbios parserChristian Gmeiner
If u-boot gets used as coreboot payload it might be nice to get vendor, model and bios version from smbios. I am not sure about the output of all the read information. With qemu target for coreboot this could look this: CBFS: Found @ offset 14f40 size 3b188 Checking segment from ROM address 0xffc15178 Checking segment from ROM address 0xffc15194 Loading segment from ROM address 0xffc15178 code (compression=1) New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150 Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150 using LZMA Loading segment from ROM address 0xffc15194 Entry Point 0x01110000 BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms Jumping to boot code at 0x01110000(0x07fa7000) U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200) CPU: x86_64, vendor AMD, device 663h DRAM: 127.1 MiB MMC: Video: No video mode configured in coreboot! Video: No video mode configured in coreboot! Vendor: QEMU Model: Standard PC (i440FX + PIIX, 1996) Bios Version: 4.12-3152-g326a499f6f-dirty Net: e1000: 52:54:00:12:34:56 eth0: e1000#0 No working controllers found Finalizing coreboot Hit any key to stop autoboot: 0 Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-01board: ge: b1x5v2: Add GE B1x5v2 and B1x5Pv2Sebastian Reichel
GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor series (GE Bx50). It consists of a carrier PCB used in combination with a Congatec QMX6 SoM. This adds U-Boot support using device model everywhere and SPL for memory initialization. Proper configuration is provided as 'ge_b1x5v2_defconfig' and the combined image u-boot-with-spi.imx can be flashed directly to 1024 byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can be loaded separately via USB-OTG using e.g. imx_usb. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-01board: phytec: imx8mm: Add PHYTEC phyCORE-i.MX8MM supportTeresa Remmet
Add support PHYTEC phyCORE-i.MX8MM SOM. Supported features: - 2GB LPDDR4 RAM - 1x 1Gbit Ethernet - eMMC - external SD - debug UART3 - watchdog - i2c eeprom Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2020-11-01defconfig: Enable CONFIG_SHOW_BOOT_PROGRESS for imx53's HSC and DDC devicesLukasz Majewski
This option allows using show_boot_progress to visualize the state of boot process. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-11-01verdin-imx8mm: enable fdt overlays and env importingIgor Opaniuk
Enable CONFIG_CMD_IMPORTENV and CONFIG_OF_LIBFDT_OVERLAY needed for booting regular Toradex BSP images. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-10-30Merge tag 'u-boot-rockchip-20201031' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - New PX30 board: Engicam PX30.Core; - Fix USB HID support for rock960; - Remove host endianness dependency for rockchip mkimage; - dts update for rk3288-tinker; - Enable console MUX for some ROCKPi boards; - Add config-based ddr selection for px30;
2020-10-30Merge tag 'dm-pull-30oct20' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm of-platdata and dtoc improvements sandbox SPL tests binman support for compressed sections
2020-10-30rockchip: Add Engicam PX30.Core C.TOUCH 2.0Jagan Teki
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30rockchip: Add Engicam PX30.Core EDIMM2.2 Starter KitJagan Teki
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30rockchip: Enable Console MUX in ROCKPi N8Jagan Teki
Enable Console multiplexing in ROCKPi N8 which would is required to video out the console buffer. Enable it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30rockchip: Enable Console MUX in ROCKPi N10Jagan Teki
Enable Console multiplexing in ROCKPi N10 which would is required to video out the console buffer. Enable it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30imx6: enable early spi environment access on aristainetos boardsHeiko Schocher
On aristianetos boards the display type is detected through "panel" environment variable. Dependend on the display type we detect the board type and this decides which DTB we have to use for the board. So we need early spi environment access. Signed-off-by: Heiko Schocher <hs@denx.de>
2020-10-30rockchip: Rock960: fix up USB supportPeter Robinson
Fix up USB config options so keyboards and other USB devices work. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> Change-Id: I34b0696e0ac7303186f20c83278dde340399b690
2020-10-29dm: Add a test for of-platdata parent informationSimon Glass
Add a simple test that we can obtain the correct parent for an I2C device. This requires updating the driver names to match the compatible strings, adding them to the devicetree and enabling a few options. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Add a test for of-platdata phandlesSimon Glass
We have a test in dtoc for this feature, but not one in U-Boot itself. Add a simple test that checks that the information comes through correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Build tests for SPLSimon Glass
We want to run unit tests in SPL. Add a new Kconfig to control this and enable it for sandbox_spl Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Armada 8k: Add NAND support via PXA3xx NAND driver (Baruch) - Armada 8k: Use ATF serdes init instead of the "old" U-Boot version (Baruch) - Minor update to Octeon TX/TX2 defconfig (Stefan)
2020-10-29Merge tag 'xilinx-for-v2021.01-v2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
2020-10-29configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- Bug fixes and updates on vid, ls1088a lx2160a and other layerscape platforms. - Add optee_rpmb support for LX2 & Kontron sl28 support
2020-10-29xilinx: Enable SPI driver for VersalMichal Simek
Enable Zynq SPI driver for Versal. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29arm: octeontx: Enable network support in supported boardsStefan Roese
Enable the now included network drivers in the currently supported Marvell Octeon TX & TX2 boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
2020-10-28test: mux-cmd: Add tests for the 'mux' commandPratyush Yadav
Tests tests run the three mux subcommands: list, select, and deselect, and verify that the commands do what we expect. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-28test: Add tests for the multiplexer frameworkJean-Jacques Hiblot
Provide tests to check the behavior of the multiplexer framework. Two sets of tests are added. One is using an emulated multiplexer driver that can be used to test basic functionality like select, deselect, etc. The other is using the mmio mux which adds tests specific to it. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27nokia_rx51: re-enable CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENVAnatolij Gustschin
With disabled legacy VIDEO option CONSOLE_MUX is not auto-selected any more, re-enable it. Fixes: 9dec5a0ea130 ("nokia_rx51: disable obsolete VIDEO config") Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Pali Rohár <pali@kernel.org>
2020-10-27microblaze: Enable board_late_init()Michal Simek
In board_late_init() several variables are setup to match the current configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: Enable SF_TEST command for all ARM based platformsMichal Simek
Enable this command by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: zynq: Enable AES commandMichal Simek
Enable AES command to be able to use it directly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: Enable FRU command for all ARM based platformsMichal Simek
Enable it by default for board detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27microblaze: Enable i2c DM by defaultMichal Simek
Microblaze has been converted fully to DM that's why enabled DM for I2C too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: common: Move ZYNQ_GEM_I2C_MAC_OFFSET to board KconfigMichal Simek
There is no reason to have ZYNQ specific Kconfig macro in generic location to be visible for all other SoCs. That's why move it to Xilinx common location to be visible only for us. Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to disable it or enable. This has connection to code which is reading the whole content of i2c and also work with the rest of date not just with MAC address. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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