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Complex stacks like NAND and others need 2M of malloc space. So increase
the malloc space accordingly.
Suggested-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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This allows us to download large images like linux kernel and flash it
to boot media. Drop from defconfigs so that its common across platform.
Note the some *_r5_*defconfigs set this to even higher value but thats
useless as ARCH_K3 doesn't use u-boot.img for R5.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Increase the amount of the stack to use as memory pool for
malloc_simple after switching the stack to DRAM to 1.25MB
Default size of memory pool is 1MB, which can not process
the increased size of new tispl.bin that includes fsstub-gp,
fsstub-fs, fsstub-hs with error "alloc space exhausted".
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
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Enable I2C and EEPROM related configs to determine correct board
Model and names.
Signed-off-by: Nitin Yadav <n-yadav@ti.com>
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Enable the CONFIG_TI_SECURE_DEVICE by default
Non-HS devices will continue to boot due to runtime device type detection.
TI's security enforcing SoCs will authenticate each binary it loads by
comparing it's signature with keys etched into the SoC during the boot
up process. The am62x family of SoCs by default will have some level of
security enforcement checking. To keep things as simple as possible,
enable the CONFIG_TI_SECURE_DEVICE options by default so all levels of
secure SoCs will work out of the box
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
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On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.
This means we will need to move the stack & heap from OCSRAM to HSM RAM
and reduce the size of BSS and the SPL to allow it to fit properly.
To protect us from overflowing our ~256k of HSM SRAM, add limits and
check during the wakeup SPL build.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Clean configuration for am62x_evm using savedefconfig
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Tested-by: Dhruva Gole <d-gole@ti.com>
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In f422c4bec the configuration option to support s28hs512t SPI flashes
was changed from CONFIG_SPI_FLASH_S28HS512T to CONFIG_SPI_FLASH_S28HX_T
to support the wider family. Follow this change in the AM62x EVM
configurations.
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
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Add am62x_evm_r5_defconfig for OSPI Flash support in R5 SPL
and am62x_evm_a53_defconfig for A53 SPL and U-Boot
support.
These configs enable OSPI Flash boot functionality in the board as well
as the usage of OSPI Flash from U-Boot.
Signed-off-by: Dhruva Gole <d-gole@ti.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Resync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Enable ESM driver for AM62x in R5 SPL/u-boot build.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
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Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is
needed to calculate the size of DDR that is available.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Add am62x_evm_r5_defconfig for R5 SPL and am62x_evm_a53_defconfig for
A53 SPL and U-Boot support.
To keep the changes to minimum. Only UART And SD boot related configs
are included. This should serve as good starting point for new board
bringup with AM62x.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
[trini: Migrate a number of CONFIG symbols, have re-tested]
Tested-by: Georgi Vlaev <g-vlaev@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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