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2013-06-20powerpc/mpc85xx:Fix "boot page TLB" entry size for NAND SPLPrabhakar Kushwaha
e500v2 processor does not support 8K page size TLB entries. So create new TLB entry only during NAND SPL boot. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-2085xx: Change case of MPC85XX_PORBMSR_ROMLOC_SHIFTAndy Fleming
All the other constants use lowercase 'x' in "MPC85xx", so we duplicate that here. Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9131rdb: Update default boot environment settingsPriyanka Jain
BSC9131RDB has 1GB DDR. Out of this, only 880MB is passed on to Linux via bootm_size. Remaining -16MB is reserved for PowerPC-DSP shared control area -128MB is reserved for DSP private area. Also 256MB, out of this 880MB is required for data communication between PowerPC and DSP core. For this bootargs are modified to pass parameter to create 1 hugetlb page of 256MB via default_hugepagesz, hugepagesz and hugepages Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9131rdb: Add DSP side tlb and lawsPriyanka Jain
BSC9131RDB is a Freescale Reference Design Board for BSC9131 SoC which is a integrated device that contains one powerpc e500v2 core and one DSP starcore. To support DSP starcore -Creating LAW and TLB for DSP-CCSR space. -Creating LAW for DSP-core subsystem M2 memory Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9131rdb: Add targets for Sysclk 100MHzPriyanka Jain
BSC9131RDB supports Sysclk -66MHz if jumper J16 is close (default state) -100MHz if jumper J16 is open Add targets -BSC9131RDB_NAND_SYSCLK100 : for NAND boot at Sysclk 100MHz -BSC9131RDB_SPIFLASH_SYSCLK100: for SPI boot at Sysclk 100MHz Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9132qds:Add NAND boot support using new SPL formatPrabhakar Kushwaha
- Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB, LAW entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9131rdb:Add NAND boot support using new SPL formatPrabhakar Kushwaha
- Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/p1010rdb:Add NAND boot support using new SPL formatPrabhakar Kushwaha
- defines constants - Add spl_minimal.c to initialise DDR - update TLB entries as per NAND boot - remove nand_spl support for P1010RDB Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20powerpc/mpc85xx: new SPL support for IFC NANDPrabhakar Kushwaha
Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR Conflicts: arch/arm/include/asm/arch-omap5/omap.h Signed-off-by: Tom Rini <trini@ti.com>
2013-06-12arm: pxa: Add support for ICP DAS LP-8x4xSergey Yanovich
LP-8x4x is a programmable automation controller by ICP DAS. It is shipped with outdated U-Boot v1.3.0 This patch adds enough supports to boot the board: - 128M of 128M SDRAM - 32M of 48M NOR Flash memory - 1 of 4 Serial consoles (PXA FFUART) - 2 of 2 Ethernet controllers (DM9000) Signed-off-by: Sergey Yanovich <ynvich@gmail.com> Series-to: u-boot Series-cc: marex
2013-06-10Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-06-10arm/km: make local functions staticHolger Brunck
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-06-10arm: da830: moved pinmux configurations to the arch treeVishwanathrao Badarkhe, Manish
Move pinmux configurations for the DA830 SoCs from board file to the arch tree so that it can be used for all da830 based devices. Also, avoids duplicate pinmuxing in case of NAND. Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
2013-06-10arm: Remove OMAP2420H4 and all omap24xx supportTom Rini
The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini <trini@ti.com>
2013-06-10da830: add MMC supportVishwanathrao Badarkhe, Manish
Add MMC support for da830 boards in order to perform mmc operations(read,write and erase). Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
2013-06-10ARM: DRA7xx: Update pinmux dataLokesh Vutla
Updating pinmux data as specified in the latest DM Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com>
2013-06-10ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.hLokesh Vutla
To be consistent with other ARM platforms, renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP4+: Cleanup header filesLokesh Vutla
After having the u-boot clean up series, there are many definitions that are unused in header files. Removing all those unused ones. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10am33xx: Board: Make CPSW section of ethernet initialization depend on CPSW ↵Joel A Fernandes
driver Not doing so breaks cases where CPSW is not required such as for USB RNDIS network boot. Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
2013-06-08Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
Conflicts: drivers/serial/Makefile
2013-06-07am335x: enable falcon boot mode for mmc (raw and fat) and nandPeter Korsgaard
Jump into full u-boot mode if a 'c' character is received on the uart. We need to adjust the spl bss/malloc area to not overlap with the loadaddr of the kernel (sdram + 32k), so move it past u-boot instead. For raw mmc, we store the kernel parameter area in the free space after the MBR (if used). For nand, we use the last sector of the partition reserved for u-boot. This also enables the spl command in the full u-boot so the kernel parameter area snapshot can be created. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-06-07Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2013-06-06vf610twr: Drop unneeded 'status' variableFabio Estevam
No need to use the 'status' variable, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2013-06-05ARM: bcm2835: add simplefb DT node during bootz/mStephen Warren
Add a DT simple-framebuffer node to DT when booting the Linux kernel. This will allow the kernel to inherit the framebuffer configuration from U-Boot, and display a graphical boot console, and even run a full SW- rendered X server. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Simon Glass <sjg@chromium.org>
2013-06-05Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2013-06-05am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.cTom Rini
We need to call the save_omap_boot_params function on am33xx/ti81xx and other newer TI SoCs, so move the function to boot-common. Only OMAP4+ has the omap_hw_init_context function so add ifdefs to not call it on am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx boards. Reviewed-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-06-04Add support for Congatec Conga-QEVAl boardSARTRE Leo
Add minimal support (only boot from mmc device) for the Congatec Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad processor) module. Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2013-06-03wandboard: Enable HDMI splashscreenFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-06-03mx6: mx6qsabrelite/nitrogen6x: Remove incorrect setting of gpio CS signalAndrew Gabbasov
The number of gpio signal is packed inside CONFIG_SF_DEFAULT_CS macro (shifted and or'ed with chip select), so it's incorrect to pass that macro directly as an argument to gpio_direction_output() call. Also, SPI driver sets the direction and initial value of a gpio, used as a chip select signal, before any actual activity happens on the bus. So, it is safe to just remove the gpio_direction_output call, that works incorrectly, thus making no effect, anyway. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Tested-by: Robert Winkler <robert.winkler@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2013-06-03mx6qsabreauto: Add Port Expander resetRenato Frias
There are 3 IO expanders on the mx6qsabreauto all reset by the same GPIO, just set it to high to use the IO. Signed-off-by: Renato Frias <b13784@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2013-06-03mx6qsabreauto: Add i2c to mx6qsabreauto boardRenato Frias
Add i2c2 and 3 to mx6qsabreauto board, i2c3 is multiplexed use gpio to set steering. Signed-off-by: Renato Frias <b13784@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2013-06-03arm: vf610: Add basic support for Vybrid VF610TWR boardAlison Wang
VF610TWR is a board based on Vybrid VF610 SoC. This patch adds basic support for Vybrid VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-05-31Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini
2013-05-31mtd: resync with Linux-3.7.1Sergey Lapin
This patch is essentially an update of u-boot MTD subsystem to the state of Linux-3.7.1 with exclusion of some bits: - the update is concentrated on NAND, no onenand or CFI/NOR/SPI flashes interfaces are updated EXCEPT for API changes. - new large NAND chips support is there, though some updates have got in Linux-3.8.-rc1, (which will follow on top of this patch). To produce this update I used tag v3.7.1 of linux-stable repository. The update was made using application of relevant patches, with changes relevant to U-Boot-only stuff sticked together to keep bisectability. Then all changes were grouped together to this patch. Signed-off-by: Sergey Lapin <slapin@ossfans.org> [scottwood@freescale.com: some eccstrength and build fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-05-30tx25: copy SPL directly, not using relocate_code.Albert ARIBAUD
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Simon Glass <sjg@chromium.org>
2013-05-30mx31pdk: copy SPL directly, not using relocate_code.Albert ARIBAUD
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Simon Glass <sjg@chromium.org>
2013-05-30Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD
Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
2013-05-28Tegra: T30: Beaver: Fix board/board_name env vars, s/b beaver, not cardhuTom Warren
Did a 'strings u-boot-dtb-tegra.bin | less' and saw that both board and board_name == beaver. Didn't test as I have no T30 Beaver board here. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2013-05-24powerpc/b4860qds: Add LAW Target ID and Create LAW entry for MapleShaveta Leekha
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/p5040: fix mdio mux for 10G portShaohui Xie
Current driver of p5040 assumes 10G port follows 1G port DTSEC5 in eth port enum structure, it will assign mdio mux depend on this assumption. This is not true with Fman V3, which added more 1G ports after port DTSEC5 in eth port enum structure, then 10G ports on p5040 will have wrong mdio mux. So we use dynamic index for 10G ports instead of hardcoded enum value when doing mdio mux for 10G ports. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/p2041: fix serdes reference clock frequency display for PC boardShaohui Xie
PC board has different serdes clock setting with PB board, it uses same serdes frequency setting on bank2 as on bank1. PC board can be distingushed from PB board by checking CPLD version, if running on PC board, then fix the serdes reference clock frequency of bank2. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/b4860: fix for Serdes connectivity to SFP'sShaveta Leekha
Crossbar switches were wrongly programmed to route the CPRI lanes to SFP as the connectivity table was not correct. Modified it correctly for SFPs connections. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/t4240qds: fix PHY reset timeout issueShengzhou Liu
QSGMII card has different PHY address against previous SGMII card. We check the type of card in slots and set correct PHY address to avoid complainning "PHY reset timed out" during u-boot booting up. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/t4qds: Add SW7[4] in the DIP switch displayYork Sun
SW7[4] is the new bit which controls the mapping of eMMC vs SDHC. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24Enable XAUI interface for B4860QDSSuresh Gupta
- Added SERDES2 PRTCLs = 0x98, 0x9E - Default Phy Addresses for Teranetics PHY on XAUI card The PHY addresses of Teranetics PHY on XAUI riser card are assigned based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1 and slot2 - Configure MDIO for 10Gig Mac Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32MStephen George
Debug trace buffers are memory mapped in DCSR space beyond 4M. Signed-off-by: Stephen George <stephen.george@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/p5040: enable PBL tool supportShaohui Xie
Provided a default RCW for P5040, then it can use PBL to build ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/t4qds: use clock measurement for sysclk and ddr clockEd Swarthout
Use QIXIS measurement registers to obtain sysclk and ddr clock. This allows using non-standard clock speeds, set by directly writing to clock chip or store the values in qixis clock data eeprom. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/qixis: add clock measurement registersEd Swarthout
QIXIS includes frequency measurement functions for each major processor clock input. After reset (and after clocks are stable), QIXIS measures the clocks against a reference frequency and stores the results in CLK_FREQ registers. A base register supplies a multiplier which allows directly obtaining the measured value, without requiring knowledge of the target system or QIXIS core frequency. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-05 20:33:18 +0000