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commit d1857c85e2d ("environment: ti: mmc_android: update metadata partition")
switched the metadata partition to use f2fs file system.
This requires a size increase of the partition to avoid the following flash error:
Flashing metadata partition
Warning: skip copying metadata image avb footer (metadata partition size: 16777216, metadata image size: 63963136).
Sending 'metadata' (62464 KB) OKAY [ 2.477s]
Writing 'metadata' FAILED (remote: 'too large for partition')
fastboot: error: Command failed
Increase the metadata partition size for Beagle Play as well.
Fixes: d1857c85e2d ("environment: ti: mmc_android: update metadata partition")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
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Fixes below warning by including cpu_funcs.h:
"board/ti/am62px/evm.c: In function `spl_board_init`:
board/ti/am62px/evm.c:83:9: warning: implicit declaration of function
`enable_caches` [-Wimplicit-function-declaration]
83 | enable_caches();"
| ^~~~~~~~~~~~~
While at it, also sort the include headers by placing video.h at the
end.
Fixes: a7e8f56abf9 ("board: ti: am62p: Add splash screen support")
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
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commit d36ad81d25a99 ("board: ti: common: add rtc setup to common folder")
I had mistakenly copied over the gpio debounce configuration into the
external 32k rtc crystal setup. Unfortunately this causing issues with
the DSP on the AM62Ax SoC family.
Because we have no need to configure debounce on our SK boards, let's
just rip this out for now.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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The fixup_memory_node() does no change in AM64, AM62A and AM62P when
ECC is not enabled. Instead, it causes an issue of fixing up the RAM
size as 2GB instead of 4GB and 8GB for AM62A and AM62P because the
fix up is done by the R5 SPL and R5 being a 32-bit processor, the
gd->bd->bi_dram[bank].start and gd->bd->bi_dram[bank].size values are
restricted to 32-bits. So, remove the fixup_memory_node() from
spl_perform_fixups() in AM64, AM62A and AM62P's evm files.
Fixes: 410888e38c7e ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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AVS driver was getting probed with base device tree, which
leads i2c of derivative board (AM68) in bad state.
Moving AVS probe after detection of right device tree.
Fixes: eaa184009775 ("arm: k3: j721s2: Enable AVS")
Reported-by: Minas Hambardzumyan <minas@ti.com>
Cc: Manorit Chawdhry <m-chawdhry@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
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When ICSSG driver is enabled (CONFIG_TI_ICSSG_PRUETH=y) set
fw_storage_interface and fw_dev_part env variables.
These variables need be set appropriately in order to load differnet
ICSSG firmwares needed for ICSSG driver. By default the storage
interface is mmc and the partition is 1:2. User can modify this based on
their needs.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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When ICSSG driver is enabled (CONFIG_TI_ICSSG_PRUETH=y) set
fw_storage_interface and fw_dev_part env variables.
These variables need be set appropriately in order to load differnet
ICSSG firmwares needed for ICSSG driver. By default the storage
interface is mmc and the partition is 1:2. User can modify this based on
their needs.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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When CONFIG_TI_ICSSG_PRUETH is enabled, add config name check for the
icssg2 overlay in board_fit_config_match() API.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
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Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
latest changes added in the K3 Resource Partitioning Tool.
The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels would not be enough for all such use
cases for RTOS and Linux, thus sharing of resources in needed.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
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Currently, the rtc clock is being set to 32552 instead of exact 32k.
Enable the 32k crystal and setup debounce conf registers by invoking
board_rtc_init call so that rtc clock is set accurately to 32768.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
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Include the header file instead of c file.
Fixes: d36ad81d25a9 ("board: ti: common: add rtc setup to common folder")
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
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Add the header file for rtc with the macros and declarations to avoid
including '.c' file in the platform evm.c files.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
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With the latest TIFS firmware, an additional virtual interrupt and
event is reserved for TIFS usage on am62x, am62ax and am62px devices.
Update the rm-cfg to reflect this new reservation.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
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size when ECC is enabled
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().
Modify fixup_ddr_driver_for_ecc() to make the function agnostic to the
number of DDR controllers present.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
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Update to the latest RM (Resource Management) auto-generated YAMLs.
This accommodates CSI INT_AGG fix for Linux and RTOS both.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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- Add splash screen related environment variables for AM62P platform.
- Set default splash location to MMC.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
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Add MMC and OSPI NOR flash as storage locations for splash screen Enable
video memory reservation and splash display by calling board specific
routine for splash screen.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
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Add Main-R5F and C7x nodes to the SOC file and keep them disabled.
Rename the firmwares for MCU and WKUP R5F cores.
Enable IPC support for main, mcu and wakeup R5F and C7x cores
with memory craveouts and mailboxes.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
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The TMDS64EVM [1] ships with AM64X SR2.0 HS-FS chip
and a slightly different board name in the board information
EEPROM header. Support this board.
[1] https://www.ti.com/tool/TMDS64EVM
Gets rid of below message at boot
"Unidentified board claims AM64-EVM in eeprom header"
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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Introduce the basic files needed to support the TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
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Update variable name_fdt for beagleboneai64 case with vendor prefix
to locate the dtb files. This prefix of vendor specific directory
is made to avoid naming issues and match the path on the latest kernel
versions.
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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This reverts commit d2099587d661c6ca2309256c0e04c06e26c8d34c.
According to TI changing the VDD_CORE while the SoC is running is not
allowed, the voltage must be set before the AM62 device reset is
released, revert this change therefore.
The correct solution would be to program the PMIC during manufactoring
according to the speed grade of the SoC.
Upstream-Status: Backport [ea7d3eec1e6e6541db68bf48a1314410e06cd9de]
Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1318338/am623-booting-from-mmc-failed-after-lowering-vdd_core-to-0-75v/5036508#5036508
Fixes: d2099587d661 ("board: verdin-am62: set cpu core voltage depending on speed grade")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
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Speed grade T requires the VDD_CORE voltage to be 0.85V if using
the maximum core frequency.
Speed grades G, K, S allow the VDD_CORE voltage to be 0.75V up to the
maximum core frequency but allow to run at 0.85V.
For efficiency in manufacturing and code maintenance we use 0.85V for
the PMIC defaults and device tree settings and dynamically adjust the
voltage in the PMIC and device tree to 0.75V for lower speed SKU to
gain more than 100mW power consumption reduction.
Upstream-Status: Submitted [https://lore.kernel.org/all/20240117101743.3955852-1-max.oss.09@gmail.com/T/#t]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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TI recommends to clear the bit independent of the used voltage.
So the comment which claims to do it due to the core voltage
at 0.85V is bogus.
See https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1252724/am625-usb-phy-core-voltage-selection-and-vdda_core_usb-mismatch
Upstream-Status: Submitted [https://lore.kernel.org/all/20240117101743.3955852-1-max.oss.09@gmail.com/T/#t]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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RC Release 09.01.00.008
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Provide MCU R5 firmware name for u-boot loading of MCU remote core.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
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RC Release 09.01.00.006
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Share the MCU GPIO interrupts between A53 core and DM R5 core. Allocating
2 instances each to A53 and DM R5.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
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Update am62ax rm-cfg with allocation entries for C7x core. Following
updates are added for C7x:
- Share split BCDMA tx and rx channels between DM R5 and C7x
- Share rings for split BCDMA tx and rx channels between DM R5 and C7x
- Add Global events and Virtual interrupts for C7x
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
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Minor formatting updates to the rm board configuration file for
am62x and am62ax boards.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
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This reverts commit eff76d94a30dac6904f19ccd18838a44a6790879.
This patch brought in cumulative updates from resource-partitioning
tool, including a change for latest TIFS firmware (v09.01.07) which
breaks backward compatibility. The TIFS firmware is updated to revert
the change that caused backward compatibility break (v09.01.08).
Reverting this patch and bringing in the updates (minus the change done
for the compatibility breaking TIFS firmware) in granular patches
subsequently.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
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Update RM boardcfg to latest output from k3-resource-partitioning
tool for am62, am62ax and am62px devices.
Commit SHA of k3-resource-partitioning tool:
e8dcac2413f918aad02298fbe476891c71823c41
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Tested-by: Dhruva Gole <d-gole@ti.com> #am62px
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Copy this over from k3_dfu.env.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
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mtdids and mtdparts defined in nand.env are not suitable
for am64x-evm. Define its own here.
We deliberately don't define spi.nor partitions here as
it causes mtdparts and dfu to fail till user has done
"sf probe" command. This is because NOR flash is not
auto probed by u-boot.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
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Since we are using overlay for A53 SPL and A53 u-boot the
SPL must select the NAND overlay from the FIT image if
HSE card is present.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
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Beagle x15 phy_ctrl_const_regs structure is the common structure
for all AM57x platforms. Add board specific structure for
phy_ctrl_const_regs.
Update the emif_get_reg_dump() function to select phy_ctrl_const_regs
structure based on board name.
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
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AM62B-P1 is PMIC variant of AM62B board. Add support to detect this
board based on EEPROM string. This will help in implementing handling
board specific DT fixups later on.
Schematics: https://www.ti.com/tool/SK-AM62B-P1
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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Add Android bootflow support for AM62PX SoC.
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
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The am62px utilizes the same 32k crystal for a more accurate RTC clock
source. Enable the configuration to set this up for Linux.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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The am62xxx extended family uses the same 32k crystal for all of its
starter kits. Move this to the common board directory to avoid repeating
this everywhere.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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The am62x utilizes the same 32k crystal for a more accurate RTC clock
source. Enable the configuration to set this up for Linux.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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The am62ax utilizes the same 32k crystal for a more accurate RTC clock
source. Enable the configuration to set this up for Linux.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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All of the starter kit boards for the am62xxx extended family utilize
the same 32k crystal oscillator for a more accurate clock for the RTC
instance. Add the setup the clock mux and debounce configuration to the
common board directory so the entire am62xxx extended family can utilize
it.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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Update to the latest RM (Resource Management) auto-generated YAMLs.
This fixes failures seen while requesting DMASS IRQs from the firmware,
which prevented use of many peripherals that rely on DMA like Audio
(McASP), Camera (CSI-RX) etc.
Fixes: 817bff8f64 ("board: ti: introduce basic board files for the am62px family")
Signed-off-by: Jai Luthra <j-luthra@ti.com>
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Introduce the basic files needed to support the am62px family of SoCs
Co-developed-by: Hari Hagalla <hnagalla@ti.com>
Signed-off-by: Hari Hagalla <hnagalla@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
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EEPROM detection logic in ti_i2c_eeprom_get() involves reading the total
size followed by reading 1-byte size with an offset 1. This commit fixes
the header matching issue in commit 9f393a2d7af8 ("board: ti: common:
board_detect: Fix EEPROM read quirk for 2-byte").
In the previous commit, the value with one offset is being read into
offset_test, but the pointer used to match was still ep. After reading
with an offset 1, the second byte of the header is compared with the 1-byte
data read from EEPROM. This is taken care by comparing proper first byte
value from the header.
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Fixes: 9f393a2d7af8 (board: ti: common: board_detect: Fix EEPROM read quirk for 2-byte)
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Set remote proc FW binaries for u-boot loading of remote cores.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
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For systems with 512MB DDR, reduce the top 64MB for firmwares instead of
current 256MB. This provides more useable memory for U-Boot during image
load.
Fixes: 64c0d9e010da ("board: ti: am62x: Avoid overwriting reserve mem for AM62 SIP")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Link the default firmware in the environment variable for MCU R5 core1.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
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Initialize the 3 instances of SOC ESM & PMIC ESM.
This is needed for watchdog functionality.
Signed-off-by: Keerthy <j-keerthy@ti.com>
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