summaryrefslogtreecommitdiff
path: root/board
AgeCommit message (Collapse)Author
2018-05-01tdx-cfg-block: add config block supportStefan Agner
Add Toradex config block support for i.MX8QM. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-05-01tdx-cfg-block: add new SKUsStefan Agner
Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-05-01tdx-cfg-block: add new sku'sMax Krummenacher
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-02-05apalis-imx8: remove unused GPIOsStefan Agner
Remove GPIOs used on the validation board but not required on Apalis iMX8. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-05apalis-imx8: use UART1 as console UARTStefan Agner
NXP LPUART1 is used as Apalis UART1, which is the main console on our Linux BSP. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-05apalis-imx8: fix EthernetStefan Agner
Make sure that all pins connected to the Micrel KSZ9031 PHY are muxed. Properly reset the PHY after all muxing has been applied. This makes sure that strapping is not overwritten by the SoC default mux (particularly it makes sure that CLK125_NDO is not driven low during reset). Make sure to not use CONFIG_DM_ETH as it seems to break ETH support as is. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-05apalis-imx8: remove PCA9557 GPIO controllersStefan Agner
The Apalis iMX8 module does not have PCA9557 GPIO controllers on the module. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-05apalis-imx8: fix eMMC/MMC/SD interface muxingStefan Agner
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-05apalis-imx8: initial addStefan Agner
Initial board support for Apalis iMX8 using a copy of NXP iMX8QM ARM2 LPDDR4 board. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-01-17MLK-17402 imx8qm/qxp_arm2: Reset ENET1 PHY and MAX7322 at initYe Li
Since kernel enables both ENET0 and ENET1, so change to reset ENET1 PHY and MAX7322 as well even the configuration is set to use ENET0 in u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 9ce009caf4c80fbcb31526049420d6c388494247)
2018-01-17MA-10983-1 Load HDMI firmware from u-boot.binHaoran.Wang
Load HDMI firmware from u-boot.bin instead of /system partition. Change-Id: I8945940cfe14db50c95a56b8bff2a94990a7fbaf Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
2017-12-29MLK-17303-2 imx: 8qm: Fix ENET1 buildPeng Fan
Fix ENET1 build and enablement. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit b799894c4e56a4afee0d7c8041bd49d718d0bd35)
2017-12-29MLK-17303-1 imx: 8qxp: Fix ENET1 enablementPeng Fan
Fix build error. Correct ENET1 enablement, Define CONFIG_FEC_ENET_DEV 1, to enable ENET1 on Base board. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 2440ee9ac2c66819e1cc664bd92fb8f092544059)
2017-12-18MLK-17236 imx8qm_mek: Enable base board powerYe Li
Since SCFW switches off the base board at default, we need to turn on it in u-boot, so that perpherals on base board can work. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 3bc93fa619c29b1344002ef4d96478bf8f9a2fde)
2017-12-12MLK-17119 i.MX8QM DDR4 ARM2 SupportTeo Hall
Add support for DDR4 board in u-boot. Main changes are the SD card slot and ddr type Signed-off-by: Teo Hall <teo.hall@nxp.com>
2017-12-08MLK-17109-4 imx8mq_arm2: Add i.MX8MQ DDR3L and DDR4 ARM2 boards supportYe Li
Add board codes, configurations, DTS and DDR initialization codes for the DDR3L and DDR4 ARM2 boards. Supported modules - DDR3L ARM2: Two RANK DDR3L, QSPI B, eMMC/SD, RMII ENET, UART. - DDR4 ARM2: Two RANK DDR4, SD, NAND, RGMII ENET, UART. NAND read/write/erase is ok in u-boot, NAND SPL boot will be tested later when tool is ready. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-12-08MLK-17109-1 imx8m: clock: Add more frequencies support in dram pll init functionYe Li
Add 400Mhz, 600Mhz and 800Mhz frequencies for dram pll init function to support DDR3L/DDR4/LPDDR4. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-12-08MLK-17093 imx8qm/qxp: enable control bit for RGMII interface RX clock delayFugang Duan
Due to RGMII interface timing requirement for imx8qm/qxp mek and arm2 board, it needs to enable RX clock delay. It should not depend on HW default status since kernel may clear the bit only on imx8qm/qxp platforms, then reboot test will cause uboot networking failed. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2017-12-05MLK-17082-02 imx: add optee support for imx6slBai Ping
Add defconfig for tee support; Enable the TZASC support; Add env config for tee support. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-12-05MLK-17082-01 imx: add optee support for imx6sllBai Ping
Add different defconfig for optee; Enable the TZASC support; Add env config for tee support. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-12-04MLK-17055 imx8mq: evk: update DDR seting for display flickering issueJian Li
1. With this change, no flickering when LCDIF + MIPI-DSI in 720p60 single display case 2. With this change, no flickering when DCSS in 4kp60 while running 4x memtester at the same time side effect: GPU resolve performance downgrade ~20%, no obvious impact to non-resolve GPU cases. Signed-off-by: Jian Li <jian.li@nxp.com>
2017-12-01MLK-17048 imx8mq_evk: Fix SD CD pad issue in SPLYe Li
The EVK board does not use external pull up resistor for SD CD pin, it requires the pad to be configured as pull up, otherwise the signal level is always low even the card is not inserted. This patch configures the pad of CD and RESET to pull up to align with kernel, although there is already a external pull up for RESET. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-11-20MLK-16899 imx8mq: evk: Add back LPDDR4 performance register settingsPeng Fan
Add back LPDDR4 performance register settings Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-11-10MLK-16794 imx8qxp: support ddr3 arm2 boardPeng Fan
Support DDR3 ARM2 board. Most parts are same as LPDDR4 ARM2 board, so share code with LPDDR4 ARM2. The DRAM size is 1GB on DDR3 ARM2 board. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-11-10MLK-16795 imx8mq_evk: Rename SPL DDR files and public functionsYe Li
Change to use more generic name for DDR files and public functions used in SPL, not specified to LPDDR4. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-11-10MLK-16753-9 imx: mx7: add optee supportPeng Fan
Add different defconfigs. Enable Trustzone. Update env to runtime boot OP-TEE. mx7d arm2 board not supported now. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-11-10MLK-16753-8 imx: mx6ul/ull: add optee supportPeng Fan
Add different defconfigs. Enable Trustzone. Update env to runtime boot OP-TEE. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-11-10MLK-16753-7 imx: mx6sx: add optee supportPeng Fan
Add different defconfigs. Enable Trustzone. Update env to runtime boot OP-TEE. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-11-10MLK-16753-6 imx: mx6sabresd: add optee supportPeng Fan
Add different defconfigs Enable Trustzone. Update env to runtime boot OP-TEE. To 6QP SDB, TZASC enabled, need board rework and new ddr script. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-11-10MLK-16753-5 imx: mx6qsabreauto: add optee supportPeng Fan
Add defconfigs. Enable Trustzone. Update env to runtime boot OP-TEE. To 6QP AUTO, TZASC not enabled now. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-11-08MLK-16773 imx8m: spl: implement wdog resetPeng Fan
Implement wdog reset in SPL stage. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-11-03MLK-16758-2 imx8qxp_mek: Enable USBOTG1 support on MEK base board for androidYe Li
Android needs to use USBOTG port on MEK base board for fastboot (USB device mode). Add relevant node to DTS and update configurations to enable the port in android build. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-11-03MLK-16728 imx8mq: evk: reserve the tee space when tee enabledPeng Fan
rom_pointer[0] contains the base, rom_pointer[1] contains the size. When TEE enabled, if not reserve the space, uboot relocation may overwrite TEE or trigger fault when TZASC enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2017-11-03MLK-16689: Add DDR PHY training flow for different frequencyBai Ping
On our i.MX8MQ EVK board, we will support three frequency point: 1. 3200mts, DDRC core clock is 800MHz; 2. 400mts, DDRC core clock is 100MHz; 3. 100mts, DDRC core clock is 25MHz. The 1D training flow need to be run once for each frequency. The PHY training updated to support training different frequency point. Additionally, the DDRC's registers of other frequency also need to be configured. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2017-11-03MLK-16679: Add 2d training code on imx8mqBai Ping
Change the DDR calibration flow from 1D training to 2D training. the hardware can use an this optional 2D training to optimize the PHY and DRAM setting in both time and voltage. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2017-11-03MLK-16599 imx8m: support SPL FITPeng Fan
Support SPL FIT. Uboot text base are also modified, because spl will load fit to address before text base of uboot. According to new ATF request, modified the SPL stack/bss to OCRAM_S space. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2017-11-03MA-9478-3 [iot] Enable Trusty for pico-imx6ulHaoran.Wang
Duplicate defconfig for pico-imx6ul by picosom-imx6ul-trusty_defconfig. Change-Id: I559124e8e94eb40f943e0c4d68b9a6da821c6f41 Signed-off-by: Haoran.Wang <elven.wang@nxp.com> (cherry picked from commit f019c752e4ac1ab210b9a09a00d48a6eaf3fefb3)
2017-11-03MA-10334 Rename Aquila board name to spriot board nameji.luo
Change-Id: Iee122d36d83bc6e1ae007fb2f2053c6e9e7fc2a2 Signed-off-by: ji.luo <ji.luo@nxp.com>
2017-11-03MA-9478-1 [iot] Enable Trusty for iopb6ul and pico7dHaoran.Wang
Change-Id: I0aa12c5092953804e724c0534f2e81abd9ee47d5 Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
2017-11-03MLK-16503 imx8qm_mek: Add support for QM MEK boardYe Li
Add build config, dts and board codes for i.MX8QM MEK board. Supported peripherals: UART, eMMC/SD, ENET, I2C, USB TYPEC DFP mode, flexspi. DTS is ported from kernel commit a4fff857ea5f0a6513b943e0b0b842d5008785f1, and enable more peripherals. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-11-03MLK-16431-3 imx8qxp_mek: Enable the USB3.0 XHCI driverYe Li
Enable the USB3.0 XHCI driver to support host mode on MEK board. The USB3.0 typec on MEK board uses PTN5110 TCPC as cc logic and power control. Different like the device on ARM2 board, this IC needs driver to control and get status through I2C bus. In this patch, we simply call the TCPC API to set to DFP mode, check the CC status for SS MUX select and enable source VBUS power. When the USB host is shutdown, disable the VBUS power. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-11-03MLK-16431-2 imx8qxp_mek: Add driver for USB typec port controller (TCPC)Ye Li
Add an simple driver for USB typec port controller in freescale common codes. The functions in this driver help to initialize the TCPC, set and work with fixed DFP role. Will improve it later to support UFP and move to driver directory. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-11-03imx8: add board_name and board_revAdrian Negreanu
Export the board_name and board_rev for these boards: - 8MQ EVK - 8QM ARM2 - 8QXP ARM2 - 8QXP MEK These two variables are used by an autotest u-boot script, to request the needed BSP files. Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2017-11-03MLK-16443 imx8qm/qxp: Fix UART pad settingYe Li
Found kernel won't be loaded when UART does not connect to the board. This is because UART received one data with frame error in this case, and stop in u-boot console. The root cause is we set wrong pad setting for UART. The pad should be set to pull up not pull down. The pull down will cause problem to UART START bit. This patch fix the UART pad to 0x600020 (input and output, high drive strength, and pull up). Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-11-03MLK-16326 imx8qxp_mek: Add LVDS0 display support for splash screenYe Li
The MEK board has two display ports, we enable the LVDS0 as default display. User needs to connect miniSAS LVDS to HDMI card on the CPU board and set "panel" env variable to "IT6263" to enable the display. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-11-03MLK-16249 mx6dlsabresd: Fix the VDD ARM voltage for 396MHz CPU freqYe Li
According to the MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015) "LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation up to 396 MHz." So change the VDD ARM to 1.15V (with 25mv margin). Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
2017-11-03MLK-16273-2 imx8mq: evk: add usb init for USB0 device modeLi Jun
Add USB0(type-c) config and PHY init to enable device mode. Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
2017-11-03MLK-16198-4 imx8qm/qxp: Update ARM2 boards to support xhci and ehci at same timeYe Li
When using DM xhci and ehci drivers, we can support both two controllers (OTG and USB3) at same time. Refactor the QM and QXP ARM2 board codes and configurations to enable them. Because the xhci-imx8 driver will initialize the clock, and DM framework will enable power domains, so only keep the power up in board level codes for non-DM driver. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng@nxp.com>
2017-11-03MLK-16195: Add support for Mini SAS display boardsOliver Brown
Added GPIOs to enable the Mini SAS display boards at startup. Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
2017-11-03MLK-16175-2 imx8qm/qxp: Remove USB OTG power domain on functionYe Li
Since the DM framework and ehci-mx6 driver will enable the power domains for USB controller and PHY via power domain driver. No need to call the power on function in board level. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>