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2018-11-02MLK-20160-2 imx8qm/qxp: Fix build error when OTG gadget is enabledYe Li
Because u-boot USB gadget only can support one driver, so if we enable ci_udc driver, the cdns3 gadget driver must be disabled. This cause build error because we don't wrap the cdns gadget functions with its configuration. Fix the issue by adding CONFIG_USB_CDNS3_GADGET before cdns3 gadget function. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-11-02MLK-20051-2 imx8mq_arm2: Split DDR to two banks for iMX8MQ DDR4 ARM2Ye Li
Because the iMX8MQ DDR4 ARM2 has 4GB DDR. To fit new MMU settings, we split it to two banks. The first bank has 3GB DDR, reach to 4GB memory map. The second bank has 1GB DDR, is beyond 4GB memory map. Notice: there is no OPTEE for ARM2 board. The trust zone setting in OPTEE for iMX8MQ EVK is not match with DDR size on ARM2 board. So ARM2 Only can work without OPTEE. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-11-02MLK-20154-2 imx8mm_ddr3l_val: Add SPI NOR supportYe Li
iMX8MM DDR3L validation board uses FPGA to link with SPI NOR flash on ECSPI1 port. Update the codes and configurations to enable the ECSPI1 to access SPI NOR in u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-11-02MLK-19877-1: iMX8QXP: Add NAND SPL supportTeo Hall
Add implementation necessary for supporting SPL on QXP ARM2 board with dynamic offset detection from container header. Signed-off-by: Teo Hall <teo.hall@nxp.com>
2018-11-02MLK-20116-3 mx7ulp_evk: Remove GPIO codes for USB IDYe Li
The iMX7ULP B0 chip has added more pins for muxing USB ID. The A3 board follows it to exploit PTC13 for USB ID, so we don't need to use GPIO any longer. The USB driver can recognize the USB mode from USB PHY. After this change, old boards with design using GPIO for USB mode won't be supported. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-10-26MLK-20106: enable nand CE_1 in i.MX8MM EVK IOMUX settingHan Xu
enable CE_1 IOMUX setting for NAND on i.MX8MM EVK Signed-off-by: Han Xu <han.xu@nxp.com>
2018-10-25MLK-20044 imx8mm_evk: update DDRC RFSHCTL3 for DDR4 timingBai Ping
Update the RFSHCTL3 config for DDR4. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-10-24MLK-20049-2 imx8mm_val: Add DDR3L validation board supportYe Li
Add DDR3 init codes, board codes, defconfig and DTS into u-boot. Basic modules are ready: SD, UART, I2C, USB host and NAND. There is a FPGA on this board. It controls WDOG_B, and ENET PHY RESET. So reset and ethernet won't work at default. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2018-10-16iMX8QX mek SPL: Add FIT image loading supportAbel Vesa
Add support for FIT image loading of ATF and uboot proper for iMX8QXP mek. Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2018-10-16iMX8QM mek SPL: Add FIT image loading supportAbel Vesa
Add support for FIT image loading of ATF and uboot proper for iMX8QM mek. Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2018-10-12MLK-19904 imx8mm_ddr4_evk: Update the mr value settingBai Ping
Update the DDR4 MR value on i.MX8MM DDR4 EVK board. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2018-10-10MLK-19881 imx8mq_arm2: Fix SPL issue to support uuuYe Li
The codes in imx8mq ARM2 SPL still return back to ROM when booting from usb serial download. This is old way to support mfgtool not uuu. Update the codes to support uuu when SPL SDP is enabled. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-10-01MLK-19777-03: imx8mm_evk: Optimize the ddr4 init flowBai Ping
Optimize the DDR4 init flow. Split the common flow with the DDR specific timing config. So the common flow can be reused. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-10-01MLK-19777-02 imx8mm: rename lpddr4_timing variable to dram_timing.Bai Ping
For LPDDR4 and DDR4, we use the same dram_timing struct to config parameters. rename the 'lpddr4_timing' to 'dram_timing' for common use. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-09-29MLK-19762 imx8mm: Fix i2c pad issue in SPLYe Li
We enable the pull-up resistor for i2c pad by setting the PAD_CTL_PUE. But this requires to enable pull resistors first by setting PAD_CTL_PE on iMX8MM, otherwise the pull-up won't work. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-28MLK-19769-1 iMX8QM SPL: Add QSPI support for imx8qm_mekAbel Vesa
Allow iMX8QM mek SPL to boot from QSPI. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2018-09-28MLK-19770-1 iMX8QM SPL: board: imx8qm_mek: Add spl implementationAbel Vesa
Add spl implementation for iMX8QM MEK board. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2018-09-27MLK-19183-14: iMX8QXP SPL: Add ARM2 board supportTeo Hall
Add implementation for ARM2 LPDDR4 board Signed-off-by: Teo Hall <teo.hall@nxp.com>
2018-09-20MLK-19645 mx6ulz_evk: Fix fdt_file variable issueYe Li
Since we set the fdt_file value when running on iMX6ULZ. This cause the saved fdt_file change be overwritten. So users can't set to their own fdt_file. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-09-20MLK-19625 mx6ulz_evk: Disable the FEC driver and support USB2NET dongleYe Li
Since the mx6ulz don't have FEC, it needs to use USB2NET dongle to connect network. We decouple the CONFIG_FEC_MXC with CONFIG_CMD_NET. For 6ull, all defconfigs need to enable the CONFIG_FEC_MXC explicitly. Another change is adding ${usb_net_cmd} environment for usb start command in netboot scripts on 6ulz. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-09-18MLK-19183-12 iMX8QXP SPL: Add QSPI support for imx8qxp_mekAbel Vesa
Allow iMX8QXP SPL to boot from QSPI. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2018-09-17MLK-19599 imx8mm_ddr4_evk: Add NAND boot supportYe Li
Add SPL and u-boot support to load images from RAWNAND device when booting from RAWNAND. The NAND SPL loads the FIT image from nandfit mtdpart at 64MB offset of NAND. Users need uuu to burn the FIT image, kernel, DTB and rootfs to all fixed mtdparts. Since NAND SPL needs large BSS and MALLOC size, this patch also moves the MALLOC pool to DDR, and enable MALLOC_F pool on OCRAM for all malloc before DDR initialization. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-14MLK-19589 baord: imx6ulz: add imx6ulz supportBai Ping
Add i.MX6ULZ support. the i.MX6ULZ is SW compatible with i.MX6ULL. so most code of i.MX6ULL can be reused by i.MX6ULZ. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-09-12MA-12669 imx8qm/qxp_mek: Guard TCPC codes with proper configLuo Ji
Separate tcpc related operations with config CONFIG_USB_TCPC so we can enable/disable this feature separately. Test: Boot ok on both imx8qm/8qxp_mek. Change-Id: I46ef775e8deb4443944c0e969a4ced67c11ac48c Signed-off-by: Luo Ji <ji.luo@nxp.com>
2018-09-11MLK-19541 imx8mm_evk: Add imx8mm DDR4 EVK CPU board supportYe Li
Add DDR4 init codes, u-boot dtb and defconfig to support DDR4 EVK. The DDR4 EVK removed eMMC and Flexspi, but use NAND instead. Current codes support to boot from SD and enable NAND access in regular u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2018-09-07MLK-19483: i.MX6/7: pack qspi header with u-boot for i.MX6/7 qspi u-bootHan Xu
To support the uuu, pack the common qspi header with u-boot binary for i.MX6/7 qspi u-boot. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-09-03MLK-19380 imx8mq_evk: update the ddr controller QoS settingTom.zheng
enhance memory controller performance and QoS setting Signed-off-by: Tom.zheng <haidong.zheng@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Jian Li <jian.li@nxp.com> (cherry picked from commit ae7b37d3ed72bad542c8e77db4bbc0325180d6d2)
2018-08-30MA-12552 Adjust SPL malloc pool and stack addressLuo Ji
This commit is basically cherry-picked from: commit ced8dc6ce85f2227a29a52d55836b73223e71e73 Author: Ye Li <ye.li@nxp.com> Date: Mon Aug 20 23:35:20 2018 -0700 MLK-19263-2 imx8mq_evk: Adjust SPL malloc pool and stack address Currently the SRAM is allocated to malloc pool due to large malloc needed by USB SDP. The stack is moved to OCRAM. This causes a problem when enabling HAB. The HAB authentication needs large memory on stack, so after ATF image loaded, the stack overwrites the ATF image in OCRAM and causes authentication failed. This patch moves the malloc pool to DDR and set back stack to SRAM. So SDP still can run with enough memory on DDR. And the stack overwrite issue can be fixed by enough memory 24KB left on SRAM. This change also need to use a early malloc pool by defining the CONFIG_MALLOC_F_ADDR. And in SPL codes, we have to adjust DDR init before board_init_r. Signed-off-by: Ye Li <ye.li@nxp.com> Change-Id: I37e0d196296b6b25662dda3dbbbc265bdf6d983f Signed-off-by: Luo Ji <ji.luo@nxp.com>
2018-08-30MA-12551 [iot] Change configs to enable uuu on AIYLuo Ji
Sync configs with BSP team to enable uuu for imx8m AIY board, create new file imx8mq_phanbell_androidthings_uuu_defconfig for uuu image build. Test: uuu works on imx8m AIY board. Change-Id: Ied7cbb6d45d084837495cec5eeb5b4947a0630c4 Signed-off-by: Luo Ji <ji.luo@nxp.com>
2018-08-21MLK-19263-2 imx8mq_evk: Adjust SPL malloc pool and stack addressYe Li
Currently the SRAM is allocated to malloc pool due to large malloc needed by USB SDP. The stack is moved to OCRAM. This causes a problem when enabling HAB. The HAB authentication needs large memory on stack, so after ATF image loaded, the stack overwrites the ATF image in OCRAM and causes authentication failed. This patch moves the malloc pool to DDR and set back stack to SRAM. So SDP still can run with enough memory on DDR. And the stack overwrite issue can be fixed by enough memory 24KB left on SRAM. This change also need to use a early malloc pool by defining the CONFIG_MALLOC_F_ADDR. And in SPL codes, we have to adjust DDR init before board_init_r. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-08-21MLK-19223 arm: imx8mm: add MXC_XXX_CLK clock map for imx common codeHaibo Chen
Now fsl_esdhc driver require the index of USDHCx_CLK_ROOT should be defined sequentially. otherwise driver may get the wrong usdhc root clock. e.g. for imx8mm, usdhc3, driver actually get the rate of I2C1_CLK_ROOT This patch add MXC_XXX_CLK, map to the real defined clock index. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> (cherry picked from commit 5cddab6e02e99a748f66e32880906aa427dc8e60) Conflicts: arch/arm/cpu/armv8/imx8m/clock_imx8mm.c
2018-08-21MA-12244-1 [Android] Load HDMI RX firmware for imx8qmLuo Ji
The hdmi rx firmware is appended to the end of u-boot binary, load it in u-boot, this will increase the size of u-boot binary by 128k. Test: hdmi rx firmware loaded successfully on imx8qm_mek. Change-Id: Ib8e8ecd70a35b56ba4498c21d8c4716f6ad6405a Signed-off-by: Luo Ji <ji.luo@nxp.com>
2018-08-21[iot] Change VDD_DRAM to 0.9V which is valid in datasheetZhang Bo
Change VDD_DRAM to 0.9V Change-Id: Ia2d0672b2f31f18add6626ac2e23e66b8c421a75 Signed-off-by: Zhang Bo <bo.zhang@nxp.com> Reviewed-on: http://androidsource.ap.freescale.net/project/5139 Reviewed-by: Wang Haoran <elven.wang@nxp.com>
2018-08-21[iot] Change VDD_3V3 to 3.1V and VDD_1V8 to 1.695VZhang Bo
Change the VDD_3V3 and VDD_1V8 to lower one to save power. Change-Id: I61f1f4ed8c6e036173d9adc5358db01bd9c835a2 Signed-off-by: Zhang Bo <bo.zhang@nxp.com> Reviewed-on: http://androidsource.ap.freescale.net/project/5144 Reviewed-by: Wang Haoran <elven.wang@nxp.com>
2018-08-20[iot] Decrease panbell DDR frequency to 1600 MTSLuo Ji
Decrease the phanbell DDR(1G + 3G) frequency to 1600 MTS, this may save some power. Test: Boot ok on both 1G and 3G DDR board, the dram_core_clk decrease from 800000000 to 400000000. Change-Id: I73b78865e7691001a868061826f0211cb9927cee Signed-off-by: Luo Ji <ji.luo@nxp.com> Reviewed-on: http://androidsource.ap.freescale.net/project/5100 Reviewed-by: Wang Haoran <elven.wang@nxp.com>
2018-08-20[iot] Support 1G DDR AIY boardLuo Ji
Add 1G DDR support, distinguish different boards by the Board ID, They are: SAI5_MCLK: Board_id[6] SAI5_RXFS: Board_id[5] SAI5_RXC: Board_id[4] SAI5_RXD3: Board_id[3] SAI5_RXD2: Board_id[2] SAI5_RXD1: Board_id[1] SAI5_RXD0: Board_id[0] Current Board ID for imx8m boards are: AIY Micron 1G: 0x5c AIY Hynix 1G: 0x56 AIY Mirconb 3G: 0x40 Wibo 3G: 0x00 imx8m_ref 3G: 0x00 Test: Boot ok on all imx8m boards. Change-Id: I3d65931483f369c545632b660f04fc9da120547d Signed-off-by: Luo Ji <ji.luo@nxp.com> Reviewed-on: http://androidsource.ap.freescale.net/project/5093 Reviewed-by: guoyin.chen <guoyin.chen@nxp.com> Reviewed-by: Wang Haoran <elven.wang@nxp.com>
2018-08-20MA-12124 [Android] Fix build warnings for u-bootLuo Ji
Fix build warnings in u-boot. Change-Id: I1944657d2d89a03c0d2303a22a09538dfaa5fd2c Signed-off-by: Luo Ji <ji.luo@nxp.com>
2018-08-20[iot] Move i2c_setup calls to board_initBraden Kell
i2c_setup calls force_idle_bus which calls get_timer if SDA and SCL are not high. On the Pico baseboard there are level shifters that pull SDA and SCL high, but the test harness does not have pull-ups on these lines. Because board_early_init_f is called before timer_init the call to get_timer was causing a divide-by-zero error due to CNTFRQ not being initialized. Moving the i2c_setup calls to board_init fixes this issue. power_init_board (which uses I2C to configure the PMIC) is called after board_init, so this should be safe. Bug: Test: PMIC registers are read correctly on both boards (DEV_ID=0x30 REV_ID=0x11) Test: iMX7D SOM boots on Pico baseboard Test: iMX7D SOM boots on test harness Change-Id: Iecdd28f3177fe915a3b614565d8dfa6e20e6a842
2018-08-16MLK-19249-1 imx8mq_evk/arm2: Force DWC3 gadget to high speedYe Li
Since the u-boot gadget class drivers don't support super speed, if we set DWC3 gadget driver to super speed, the device mode will meet problem when using USB3.0 cable. So force the DWC3 gadget driver to high speed for both SPL and regular u-boot. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-08-16MLK-18502: board:imx8mm_evk enable tzascSilvano di Ninno
Enable TZASC on i.MX 8mm. There is a need on 8MM to enable the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors. Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-08-14MLK-19218 imx8qm/qxp: spl: Fix build break in SPL buildYe Li
Get such build error below due to the changes in tcpc.h (MLK-19181-2: i.MX850: SPL enable usb support). Fix the issue by removing unused tcpc and usb header files from spl.c spl/board/freescale/imx8qxp_mek/spl.o: In function `tcpc_setup_ufp_mode': spl.c:(.text.tcpc_setup_ufp_mode+0x0): multiple definition of `tcpc_setup_ufp_mode' spl/board/freescale/imx8qxp_mek/imx8qxp_mek.o:imx8qxp_mek.c:(.text.tcpc_setup_ufp_mode+0x0): first defined here spl/board/freescale/imx8qxp_mek/spl.o: In function `tcpc_setup_dfp_mode': spl.c:(.text.tcpc_setup_dfp_mode+0x0): multiple definition of `tcpc_setup_dfp_mode' spl/board/freescale/imx8qxp_mek/imx8qxp_mek.o:/home/leyoen/Workspace/u-boot-upgrading/u-boot/board/freescale/imx8qxp_mek/imx8qxp_mek.c:547: first defined here scripts/Makefile.build:359: recipe for target 'spl/board/freescale/imx8qxp_mek/built-in.o' failed Signed-off-by: Ye Li <ye.li@nxp.com>
2018-08-13MLK-19157 imx8mm_evk: Disable dsi panel before booting kernelYe Li
Pull down the DSI_EN gpio to disable mipi dsi panel before booting kernel. This avoids display full yellow screen before kernel mipi driver probes the device. For MIPI2HDMI card, this DSI_EN gpio is not used. So nothing impact to it. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit e73adc9a139f2e8bb92bda1631fa2f2391a8a5e3)
2018-08-10MLK-19181-5 imx8mq_evk: Force USB to be high speed for uuuLi Jun
As there is problem with super speed with SDP, we force the dwc3 usb speed to be high speed. Signed-off-by: Li Jun <jun.li@nxp.com>
2018-08-10MLK-19181-2: i.MX850: SPL enable usb supportFrank Li
Enable DWC3 USB support at i.MX850D platform Signed-off-by: Frank Li <Frank.Li@nxp.com>
2018-08-10MLK-19177 imx8dx: Add iMX8DX DDR3 ARM2 board supportYe Li
Add new dts, config and defconfig file for DX DDR3 ARM2 board. Since it does not have USB3.0 and SD, disable them in DTS and header file. Also move gpio expander to i2c1 according with its schematic. In defconfig, fastboot is default enabled due to we need uuu to program eMMC. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit e5b822615a5aa2fadb481002c286f35d996999f8)
2018-08-09MLK-19182-1 iMX8QM SPL: board: imx8qm_arm2: Add spl implementationTeo Hall
Add spl implementation for LPDDR4 and DDR4 iMX8QM boards. Signed-off-by: Teo Hall <teo.hall@nxp.com>
2018-08-09MLK-19183-2 iMX8QXP SPL: board: imx8qxp_mek: Add spl specific implementationAbel Vesa
This adds the spl specific code for imx8qxp. Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2018-08-05MLK-19045 imx8mm_evk: enable the dispmix & mipi phy power domainBai Ping
dispmix & mipi phy power domain must be enabled before doing any config for lcfif and dsi. Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 240475ecb29aff22fb362ea39f3bf8e7045281db)
2018-08-05MLK-18431-03 imx8mm_evk: use the more generic dram init flow on imx8mm evkBai Ping
Refact the lpddr4 init flow on i.MX8MM EVK board. board level only need to provide the necessary dram init related parameter. Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 72a06ef47c7c93de49730261adb8f251612d1883)
2018-08-05MLK-19064 imx8qm: Add secure boot environmentYe Li
Add the secure boot relevant environment variables to ARM2 and MEK. When CONFIG_AHAB_BOOT is enabled, we will switch to boot flow: 1. Load the signed OS container to address 0x88000000 2. Using auth_cntr to authenticate the OS container. It will load the kernel and FDT to destination addresses. 3. Using booti to boot kernel. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit eb47b72c1c89deddeaa3b3618d8c28aca05cd4ad)
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