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2015-11-05Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2015-11-05Merge git://git.denx.de/u-boot-samsungTom Rini
2015-11-05video: Drop DEV_EXT_VIDEO flagBin Meng
DEV_EXT_VIDEO does not have any actual meaning, hence drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-05video: Drop DEV_FLAGS_SYSTEM flagBin Meng
DEV_FLAGS_SYSTEM does not have any actual meaning, hence drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-04Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2015-11-04mpc85xx: Add support for the Varisys Cyrus boardAndy Fleming
This board runs a P5020 or P5040 chip, and utilizes an EEPROM with similar formatting to the Freescale P5020DS. Large amounts of this code were developed by Adrian Cox <adrian at humboldt dot co dot uk> Signed-off-by: Andy Fleming <afleming@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-04ARM: zynq: Remove zc70x targetMichal Simek
Remove zc70x target which was one setting for zc702 and zc706. Currently zc702 and zc706 are separated. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-03arm: at91: reworked meesc board supportDaniel Gorsulowski
Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
2015-11-02mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter CardYangbo Lu
When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card), enable EVDD automatic control via SDHC_VS. This could support SD card IO voltage switching for UHS-1 speed mode. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter CardYangbo Lu
If adapter card type identification is supported for platform, we would enable dat[4:7] for eMMC4.5 Adapter Card. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02t1040d4rdb: assign muxed pins to qe-tdm when set hwconfig qe-tdmZhao Qiang
qe-tdm is muxed with diu, if hwconfig setted as qe-tdm, assign muxed pins to qe-tdm, then delete diu node from device tree. Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02samsung: clean up checkpatch issuesMinkyu Kang
This patch will fix these checkpatch issues. CHECK: Alignment should match open parenthesis + printf("Enter: %s %s\n", mode_name[mode][0], + mode_info[mode]); CHECK: Alignment should match open parenthesis + lcd_printf("\n\n\t%s %s\n", mode_name[mode][0], + mode_info[mode]); CHECK: Alignment should match open parenthesis + lcd_printf("\t%s %s - %s\n\n", selection[i], + mode_name[i][0], Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02odroid: clean up checkpatch issuesMinkyu Kang
This patch will fix these checkpatch issues. +static const char *mmc_regulators[] = { CHECK: Blank lines aren't necessary before a close brace '}' + +} Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02smdk2410: clean up checkpatch issuesMinkyu Kang
This patch will fix these checkpatch issues. ERROR: spaces required around that '==' (ctx:VxV) +#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */ ERROR: spaces required around that '==' (ctx:VxV) +#elif FCLK_SPEED==1 /* Fout = 202.8MHz */ ERROR: spaces required around that '==' (ctx:VxV) +#if USB_CLOCK==0 ERROR: spaces required around that '==' (ctx:VxV) +#elif USB_CLOCK==1 CHECK: spaces required around that ':' (ctx:VxV) + "bne 1b":"=r" (loops):"0" (loops)); Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02smdkv310: clean up checkpatch issuesMinkyu Kang
This patch will fix these checkpatch issues. WARNING: Avoid unnecessary line continuations + gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \ WARNING: Avoid unnecessary line continuations + gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \ WARNING: Avoid unnecessary line continuations + gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \ WARNING: Avoid unnecessary line continuations + gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02exynos5-dt-types: add board detection for Odroid XU3/XU3L/XU4.Przemyslaw Marczak
This commit adds additional file with implementation of board detection code for Odroid-XU3/XU4. The detection depends on compatible found in fdt: - "samsung,exynos5" - uses Exynos5 generic code - "samsung,odroidxu3" - try detect XU3 revision There are few revisions of Odroid XU3/XU4, each can be detected by checking the value of channel 9 of built-in ADC: Rev ADC Board 0.1 0 XU3 0.1 0.2 372 XU3 0.2 | XU3L - no DISPLAYPORT 0.3 1280 XU4 0.1 The detection code depends on the ADC+10% value. Implementation of functions: - set_board_type() - read ADC and set type - get_board_rev() - returns board revision: 1..3 - get_board_type() - returns board type string Additional functions with return values of bool: - board_is_generic() - true if found compatible "samsung,exynos5" but not "samsung,odroidxu3" - board_is_odroidxu3() - true if found compatible "samsung,odroidxu3" and one of XU3 revision. - board_is_odroidxu4() - true if found compatible "samsung,odroidxu3" and XU4 revision. After I2C controller init, the get_board_type() can check if the XU3 board is a "Lite" variant, by probing chip 0x40 on I2C0 (INA231 - exists only on non-lite). This is useful for setting fdt file name at misc_init_r(). Enabled configs: - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - CONFIG_ODROID_REV_AIN - CONFIG_REVISION_TAG - CONFIG_BOARD_TYPES Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02samsung: board/misc: check returned pointer for get_board_type() callsPrzemyslaw Marczak
The function get_board_type() is called in two places by common code, but the returned pointer was never check. This commit adds checking the returned pointer, before use it. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-30Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2015-10-30arm: ls1021atwr: optimize the deep sleep latencytang yuantian
It will take more than 1s when wake up from deep sleep. Most of the time is spent on outputing information. This patch reduced the deep sleep latency by: 1. avoid outputing system informaton 2. remove flush cache after DDR restore 3. skip reloading second stage uboot binary when SD boot Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-30SECURE_BOOT: Correct reading of ITS bitAneesh Bansal
The ITS bit was being read incorrectly beacause of operator precedence. The same ahs been corrected. Signed-off-by: Lawish Deshmukh <lawish.deshmukh@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29arm: ls1021a: Add sata support on qds and twr boardtang yuantian
Freescale ARM-based Layerscape LS102xA contain a SATA controller which comply with the serial ATA 3.0 specification and the AHCI 1.3 specification. This patch adds SATA feature on ls1021aqds and ls1021atwr boards. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add sd boot supportGong Qianyu
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardbYangbo Lu
This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043a: Add Fman supportShaohui Xie
Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add nand boot supportGong Qianyu
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add LS1043ARDB board supportMingkai Hu
LS1043ARDB Specification: ------------------------- Memory subsystem: * 2GByte DDR4 SDRAM (32bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * XFI 10G port * QSGMII with 4x 1G ports * Two RGMII ports PCIe: * PCIe2 (Lanes C) to mini-PCIe slot * PCIe3 (Lanes D) to PCIe slot USB 3.0: two super speed USB 3.0 type A ports UART: supports two UARTs up to 115200 bps for console Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
2015-10-29armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu
There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net: Move some header files to include/Shaohui Xie
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv7/ls1021a: move ns_access to common fileMingkai Hu
Config Security Level Register is different between different SoCs, so put the CSL register definition into the arch specific directory. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29Pointers in ESBC header made 32 bitAneesh Bansal
For the Chain of Trust, the esbc_validate command supports 32 bit fields for location of the image. In the header structure definition, these were declared as pointers which made them 64 bit on a 64 bit core. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-27ocotea: DropTom Rini
This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-27taishan: DropTom Rini
This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-27ebony: DropTom Rini
This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-27taihu: RemoveTom Rini
This board has not compiled for me for quite some time due to size constraints, remove. Cc: John Otken <jotken@softadvances.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-26arm: ls1021a: Add QSPI or IFC support in SD bootAlison Wang
As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in SD boot now. For the customer's demand, QSPI needs to be supported in SD boot too. This patch adds QSPI or IFC support in SD boot according to the corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is used to support QSPI in SD boot. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-24Fix bad return value checks (detected with Coccinelle)Thomas Huth
In the "Getting Started with Coccinelle - KVM edition" presentation that has been held by Julia Lawall at the KVM forum 2015 (see the slides at http://events.linuxfoundation.org/sites/events/files/slides/tutorial_kvm_0.pdf), she pointed out some bad return value checks in U-Boot that can be detected with Coccinelle by using the following config file: @@ identifier x,y; identifier f; statement S; @@ x = f(...); ( if (x < 0) S | if ( - y + x < 0) S ) This patch now fixes these issues. Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2015-10-24ARM: rpi: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG supportGuillaume GARDET
Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support and enable it to set 'board_rev' and 'board_name' envs. 'board_rev' can be used in scripts to determine what board we are running on and 'board_name' for pretty printing. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-10-23nios2: zap nios2-generic board dirThomas Chou
As we use device tree to control u-boot now, the generic board can be removed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: zap initdramThomas Chou
Zap initdram(), as it is not used. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: convert altera sysid to driver modelThomas Chou
Convert altera sysid to driver model with misc uclass. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2 : convert altera_pio to driver modelThomas Chou
Convert altera_pio to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: move altera_pio_init to board_early_init_rThomas Chou
As altera_pio_init() uses BSS, it should be moved to board_early_init_r(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
2015-10-22ARM: AM335x: mux: change mmc0 cd pinmux from mmc0_sdcd to gpioMugunthan V N
Currently omap_hsmmc driver doesn't use sdcd pin to detect whether the card is present or not. Instead the same pin is used as GPIO to detect card presence. So change the pin mux mode from mmc0_sdcd to gpio0_6. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22ARM: k2g: Add config fileLokesh Vutla
Add config file for k2g Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
2015-10-22ARM: k2g: Enable SPI flashLokesh Vutla
GPIO1_9 controls SPI flash on k2g evm. So make GPIO1_9 as output pin, inorder to use SPI. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22ARM: k2g: add SD card and eMMC supportRoger Quadros
Add MMC support for k2g Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-10-22ARM: k2g: Add Ethernet SupportVitaly Andrianov
Add Ethernet support for tftp support Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22driver: net: keystone_net: fix phy mode configurationMugunthan V N
Phy mode is a board property and it can be different between multiple board and ports, so it should not be hardcoded in driver to one specific mode. So adding a field in eth_priv_t structure to pass phy mode to driver. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22ARM: k2g: Add pin mux dataVitaly Andrianov
Add pin mux data for k2g-evm Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22ARM: k2g: Add ddr3 infoVitaly Andrianov
Add ddr3 related info Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-04 21:23:41 +0000